direct-io.hg

changeset 15376:c3f280acf41a

hvm vmx: Make VMX-related MSRs invisible to the guest.
Signed-off-by: Shane Wang <shane.wang@intel.com>
author kfraser@localhost.localdomain
date Mon Jun 18 16:59:06 2007 +0100 (2007-06-18)
parents 342c85cfd00b
children 75d82009ec70
files xen/arch/x86/hvm/vmx/vmx.c
line diff
     1.1 --- a/xen/arch/x86/hvm/vmx/vmx.c	Mon Jun 18 16:52:04 2007 +0100
     1.2 +++ b/xen/arch/x86/hvm/vmx/vmx.c	Mon Jun 18 16:59:06 2007 +0100
     1.3 @@ -2549,7 +2549,8 @@ static inline int vmx_do_msr_read(struct
     1.4  
     1.5      HVM_DBG_LOG(DBG_LEVEL_1, "ecx=%x", ecx);
     1.6  
     1.7 -    switch (ecx) {
     1.8 +    switch ( ecx )
     1.9 +    {
    1.10      case MSR_IA32_TIME_STAMP_COUNTER:
    1.11          msr_content = hvm_get_guest_time(v);
    1.12          break;
    1.13 @@ -2565,6 +2566,8 @@ static inline int vmx_do_msr_read(struct
    1.14      case MSR_IA32_APICBASE:
    1.15          msr_content = vcpu_vlapic(v)->hw.apic_base_msr;
    1.16          break;
    1.17 +    case MSR_IA32_VMX_BASIC...MSR_IA32_VMX_CR4_FIXED1:
    1.18 +        goto gp_fault;
    1.19      default:
    1.20          if ( long_mode_do_msr_read(regs) )
    1.21              goto done;
    1.22 @@ -2576,8 +2579,8 @@ static inline int vmx_do_msr_read(struct
    1.23              regs->edx = edx;
    1.24              goto done;
    1.25          }
    1.26 -        vmx_inject_hw_exception(v, TRAP_gp_fault, 0);
    1.27 -        return 0;
    1.28 +
    1.29 +        goto gp_fault;
    1.30      }
    1.31  
    1.32      regs->eax = msr_content & 0xFFFFFFFF;
    1.33 @@ -2589,6 +2592,10 @@ done:
    1.34                  ecx, (unsigned long)regs->eax,
    1.35                  (unsigned long)regs->edx);
    1.36      return 1;
    1.37 +
    1.38 +gp_fault:
    1.39 +    vmx_inject_hw_exception(v, TRAP_gp_fault, 0);
    1.40 +    return 0;
    1.41  }
    1.42  
    1.43  static int vmx_alloc_vlapic_mapping(struct domain *d)
    1.44 @@ -2667,7 +2674,8 @@ static inline int vmx_do_msr_write(struc
    1.45      msr_content = (u32)regs->eax | ((u64)regs->edx << 32);
    1.46      HVMTRACE_2D(MSR_WRITE, v, ecx, msr_content);
    1.47  
    1.48 -    switch (ecx) {
    1.49 +    switch ( ecx )
    1.50 +    {
    1.51      case MSR_IA32_TIME_STAMP_COUNTER:
    1.52          hvm_set_guest_time(v, msr_content);
    1.53          pt_reset(v);
    1.54 @@ -2684,6 +2692,8 @@ static inline int vmx_do_msr_write(struc
    1.55      case MSR_IA32_APICBASE:
    1.56          vlapic_msr_set(vcpu_vlapic(v), msr_content);
    1.57          break;
    1.58 +    case MSR_IA32_VMX_BASIC...MSR_IA32_VMX_CR4_FIXED1:
    1.59 +        goto gp_fault;
    1.60      default:
    1.61          if ( !long_mode_do_msr_write(regs) )
    1.62              wrmsr_hypervisor_regs(ecx, regs->eax, regs->edx);
    1.63 @@ -2691,6 +2701,10 @@ static inline int vmx_do_msr_write(struc
    1.64      }
    1.65  
    1.66      return 1;
    1.67 +
    1.68 +gp_fault:
    1.69 +    vmx_inject_hw_exception(v, TRAP_gp_fault, 0);
    1.70 +    return 0;
    1.71  }
    1.72  
    1.73  static void vmx_do_hlt(void)