direct-io.hg
changeset 10798:bdc0258e162a
[IA64] fix vcpu_itr_i(), vcpu_itr_d() and vcpu_flush_tlb_vhpt_range() callers
- vcpu_itr_i() and vcpu_itr_d() must purge vTLB entry which overlaps the
new inserted entry.
- some address argument of vcpu_flush_tlb_vhpt_range() was wrong.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
- vcpu_itr_i() and vcpu_itr_d() must purge vTLB entry which overlaps the
new inserted entry.
- some address argument of vcpu_flush_tlb_vhpt_range() was wrong.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
author | awilliam@xenbuild.aw |
---|---|
date | Mon Jul 10 14:11:44 2006 -0600 (2006-07-10) |
parents | 7538ae7ea365 |
children | d7a511069a32 |
files | xen/arch/ia64/xen/faults.c xen/arch/ia64/xen/vcpu.c |
line diff
1.1 --- a/xen/arch/ia64/xen/faults.c Mon Jul 10 14:08:36 2006 -0600 1.2 +++ b/xen/arch/ia64/xen/faults.c Mon Jul 10 14:11:44 2006 -0600 1.3 @@ -208,8 +208,7 @@ void ia64_do_page_fault (unsigned long a 1.4 p2m_entry_retry(&entry)) { 1.5 /* dtlb has been purged in-between. This dtlb was 1.6 matching. Undo the work. */ 1.7 - vcpu_flush_tlb_vhpt_range(address & ((1 << logps) - 1), 1.8 - logps); 1.9 + vcpu_flush_tlb_vhpt_range(address, logps); 1.10 1.11 // the stale entry which we inserted above 1.12 // may remains in tlb cache.
2.1 --- a/xen/arch/ia64/xen/vcpu.c Mon Jul 10 14:08:36 2006 -0600 2.2 +++ b/xen/arch/ia64/xen/vcpu.c Mon Jul 10 14:11:44 2006 -0600 2.3 @@ -1906,10 +1906,16 @@ IA64FAULT vcpu_itr_d(VCPU *vcpu, UINT64 2.4 TR_ENTRY *trp; 2.5 2.6 if (slot >= NDTRS) return IA64_RSVDREG_FAULT; 2.7 + 2.8 + vcpu_purge_tr_entry(&PSCBX(vcpu, dtlb)); 2.9 + 2.10 trp = &PSCBX(vcpu,dtrs[slot]); 2.11 //printf("***** itr.d: setting slot %d: ifa=%p\n",slot,ifa); 2.12 vcpu_set_tr_entry(trp,pte,itir,ifa); 2.13 vcpu_quick_region_set(PSCBX(vcpu,dtr_regions),ifa); 2.14 + 2.15 + vcpu_flush_tlb_vhpt_range(ifa & itir_mask(itir), itir_ps(itir)); 2.16 + 2.17 return IA64_NO_FAULT; 2.18 } 2.19 2.20 @@ -1919,10 +1925,16 @@ IA64FAULT vcpu_itr_i(VCPU *vcpu, UINT64 2.21 TR_ENTRY *trp; 2.22 2.23 if (slot >= NITRS) return IA64_RSVDREG_FAULT; 2.24 + 2.25 + vcpu_purge_tr_entry(&PSCBX(vcpu, itlb)); 2.26 + 2.27 trp = &PSCBX(vcpu,itrs[slot]); 2.28 //printf("***** itr.i: setting slot %d: ifa=%p\n",slot,ifa); 2.29 vcpu_set_tr_entry(trp,pte,itir,ifa); 2.30 vcpu_quick_region_set(PSCBX(vcpu,itr_regions),ifa); 2.31 + 2.32 + vcpu_flush_tlb_vhpt_range(ifa & itir_mask(itir), itir_ps(itir)); 2.33 + 2.34 return IA64_NO_FAULT; 2.35 } 2.36 2.37 @@ -1990,7 +2002,7 @@ again: 2.38 vcpu_itc_no_srlz(vcpu,2,ifa,pteval,pte,logps); 2.39 if (swap_rr0) set_metaphysical_rr0(); 2.40 if (p2m_entry_retry(&entry)) { 2.41 - vcpu_flush_tlb_vhpt_range(ifa & ((1 << logps) - 1), logps); 2.42 + vcpu_flush_tlb_vhpt_range(ifa, logps); 2.43 goto again; 2.44 } 2.45 return IA64_NO_FAULT; 2.46 @@ -2013,7 +2025,7 @@ again: 2.47 vcpu_itc_no_srlz(vcpu, 1,ifa,pteval,pte,logps); 2.48 if (swap_rr0) set_metaphysical_rr0(); 2.49 if (p2m_entry_retry(&entry)) { 2.50 - vcpu_flush_tlb_vhpt_range(ifa & ((1 << logps) - 1), logps); 2.51 + vcpu_flush_tlb_vhpt_range(ifa, logps); 2.52 goto again; 2.53 } 2.54 return IA64_NO_FAULT;