direct-io.hg

changeset 4482:ae3b1e86f62d

bitkeeper revision 1.1275 (4252bc56kCvTabPneNuKD6vpuDEO7g)

Merge bk://xen.bkbits.net/xeno-unstable.bk
into bkbits.net:/repos/x/xen-ia64/xeno-unstable-ia64.bk
author xen-ia64.adm@bkbits.net
date Tue Apr 05 16:27:02 2005 +0000 (2005-04-05)
parents 78c506cbdb5f 835fa5f22345
children 927255a97d41 69b60ce3f2dc
files .rootkeys xen/arch/ia64/domain.c xen/arch/ia64/patch/linux-2.6.7/setup.c xen/arch/ia64/tools/privify/Makefile xen/arch/ia64/tools/privify/README.privify xen/arch/ia64/tools/privify/privify.c xen/arch/ia64/tools/privify/privify.h xen/arch/ia64/tools/privify/privify_elf64.c xen/arch/ia64/xensetup.c xen/include/asm-ia64/vhpt.h xen/include/xen/sched.h
line diff
     1.1 --- a/.rootkeys	Tue Apr 05 15:53:37 2005 +0000
     1.2 +++ b/.rootkeys	Tue Apr 05 16:27:02 2005 +0000
     1.3 @@ -1130,6 +1130,11 @@ 421098b6_ToSGrf6Pk1Uwg5aMAIBxg xen/arch/
     1.4  421098b6AUdbxR3wyn1ATcmNuTao_Q xen/arch/ia64/tools/README.xenia64
     1.5  42376c6dfyY0eq8MS2dK3BW2rFuEGg xen/arch/ia64/tools/README.xenia64linux
     1.6  421098b6rQ2BQ103qu1n1HNofbS2Og xen/arch/ia64/tools/mkbuildtree
     1.7 +4252ace7eQQmDdwOqsKWdHo8JpKqnQ xen/arch/ia64/tools/privify/Makefile
     1.8 +4252ace76fKAIizJRS6S84KbK6yXYw xen/arch/ia64/tools/privify/README.privify
     1.9 +4252ace7uR0Th8eEXiLyafNPTDYrOg xen/arch/ia64/tools/privify/privify.c
    1.10 +4252ace7H2dIMPFeFwczAVoP4yAHxA xen/arch/ia64/tools/privify/privify.h
    1.11 +4252ace74lKUPFnO8PmF0Dtpk7Xkng xen/arch/ia64/tools/privify/privify_elf64.c
    1.12  41a26ebc--sjlYZQxmIxyCx3jw70qA xen/arch/ia64/vcpu.c
    1.13  421098b6M2WhsJ_ZMzFamAQcdc5gzw xen/arch/ia64/vhpt.c
    1.14  41a26ebc4jSBGQOuyNIPDST58mNbBw xen/arch/ia64/xenasm.S
     2.1 --- a/xen/arch/ia64/domain.c	Tue Apr 05 15:53:37 2005 +0000
     2.2 +++ b/xen/arch/ia64/domain.c	Tue Apr 05 16:27:02 2005 +0000
     2.3 @@ -236,13 +236,14 @@ void new_thread(struct exec_domain *ed,
     2.4  #endif
     2.5  	regs = (struct pt_regs *) ((unsigned long) ed + IA64_STK_OFFSET) - 1;
     2.6  	sw = (struct switch_stack *) regs - 1;
     2.7 +	memset(sw,0,sizeof(struct switch_stack)+sizeof(struct pt_regs));
     2.8  	new_rbs = (unsigned long) ed + IA64_RBS_OFFSET;
     2.9  	regs->cr_ipsr = ia64_getreg(_IA64_REG_PSR)
    2.10  		| IA64_PSR_BITS_TO_SET | IA64_PSR_BN
    2.11  		& ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_RI | IA64_PSR_IS);
    2.12  	regs->cr_ipsr |= 2UL << IA64_PSR_CPL0_BIT; // domain runs at PL2
    2.13  	regs->cr_iip = start_pc;
    2.14 -	regs->ar_rsc = 0xf;		/* eager mode, privilege level 1 */
    2.15 +	regs->ar_rsc = 0;		/* lazy mode */
    2.16  	regs->ar_rnat = 0;
    2.17  	regs->ar_fpsr = sw->ar_fpsr = FPSR_DEFAULT;
    2.18  	regs->loadrs = 0;
     3.1 --- a/xen/arch/ia64/patch/linux-2.6.7/setup.c	Tue Apr 05 15:53:37 2005 +0000
     3.2 +++ b/xen/arch/ia64/patch/linux-2.6.7/setup.c	Tue Apr 05 16:27:02 2005 +0000
     3.3 @@ -1,5 +1,5 @@
     3.4  --- ../../linux-2.6.7/arch/ia64/kernel/setup.c	2004-06-15 23:18:58.000000000 -0600
     3.5 -+++ arch/ia64/setup.c	2005-03-23 14:54:06.000000000 -0700
     3.6 ++++ arch/ia64/setup.c	2005-04-04 22:31:09.000000000 -0600
     3.7  @@ -21,6 +21,9 @@
     3.8   #include <linux/init.h>
     3.9   
    3.10 @@ -180,7 +180,19 @@
    3.11   	seq_printf(m,
    3.12   		   "processor  : %d\n"
    3.13   		   "vendor     : %s\n"
    3.14 -@@ -667,6 +702,8 @@
    3.15 +@@ -616,7 +651,11 @@
    3.16 + 					| IA64_DCR_DA | IA64_DCR_DD | IA64_DCR_LC));
    3.17 + 	atomic_inc(&init_mm.mm_count);
    3.18 + 	current->active_mm = &init_mm;
    3.19 ++#ifdef XEN
    3.20 ++	if (current->domain->arch.mm)
    3.21 ++#else
    3.22 + 	if (current->mm)
    3.23 ++#endif
    3.24 + 		BUG();
    3.25 + 
    3.26 + 	ia64_mmu_init(ia64_imva(cpu_data));
    3.27 +@@ -667,6 +706,8 @@
    3.28   void
    3.29   check_bugs (void)
    3.30   {
     4.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     4.2 +++ b/xen/arch/ia64/tools/privify/Makefile	Tue Apr 05 16:27:02 2005 +0000
     4.3 @@ -0,0 +1,9 @@
     4.4 +privify: privify_elf64.o privify.o
     4.5 +	gcc -g privify.o privify_elf64.o -o privify
     4.6 +
     4.7 +
     4.8 +privify_elf64.o: privify_elf64.c
     4.9 +	gcc -g -D__KERNEL__ -c privify_elf64.c
    4.10 +
    4.11 +privify.o: privify.c
    4.12 +	gcc -nostdinc -g -D__KERNEL__ -c privify.c
     5.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     5.2 +++ b/xen/arch/ia64/tools/privify/README.privify	Tue Apr 05 16:27:02 2005 +0000
     5.3 @@ -0,0 +1,8 @@
     5.4 +In this directory, just "make".
     5.5 +
     5.6 +Run the resulting program on a vmlinux that has been adjusted
     5.7 +to run on Xen (see arch/ia64/tools/README.xenia64linux):
     5.8 +
     5.9 +	./privify vmlinux xenlinux
    5.10 +
    5.11 +Use the resulting xenlinux file as domain0
     6.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     6.2 +++ b/xen/arch/ia64/tools/privify/privify.c	Tue Apr 05 16:27:02 2005 +0000
     6.3 @@ -0,0 +1,360 @@
     6.4 +/*
     6.5 + * Binary translate privilege-sensitive ops to privileged
     6.6 + *
     6.7 + * Copyright (C) 2004 Hewlett-Packard Co.
     6.8 + *      Dan Magenheimer (dan.magenheimer@hp.com)
     6.9 + *
    6.10 + */
    6.11 +
    6.12 +#include "privify.h"
    6.13 +
    6.14 +typedef unsigned long long u64;
    6.15 +typedef unsigned long long IA64_INST;
    6.16 +
    6.17 +typedef union U_IA64_BUNDLE {
    6.18 +    u64 i64[2];
    6.19 +    struct { u64 template:5,slot0:41,slot1a:18,slot1b:23,slot2:41; };
    6.20 +    // NOTE: following doesn't work because bitfields can't cross natural
    6.21 +    // size boundaries
    6.22 +    //struct { u64 template:5, slot0:41, slot1:41, slot2:41; };
    6.23 +} IA64_BUNDLE;
    6.24 +
    6.25 +typedef enum E_IA64_SLOT_TYPE { I, M, F, B, L, ILLEGAL } IA64_SLOT_TYPE;
    6.26 +
    6.27 +typedef union U_INST64_A5 {
    6.28 +    IA64_INST inst;
    6.29 +    struct { u64 qp:6, r1:7, imm7b:7, r3:2, imm5c:5, imm9d:9, s:1, major:4; };
    6.30 +} INST64_A5;
    6.31 +
    6.32 +typedef union U_INST64_B4 {
    6.33 +    IA64_INST inst;
    6.34 +    struct { u64 qp:6, btype:3, un3:3, p:1, b2:3, un11:11, x6:6, wh:2, d:1, un1:1, major:4; };
    6.35 +} INST64_B4;
    6.36 +
    6.37 +typedef union U_INST64_B8 {
    6.38 +    IA64_INST inst;
    6.39 +    struct { u64 qp:6, un21:21, x6:6, un4:4, major:4; };
    6.40 +} INST64_B8;
    6.41 +
    6.42 +typedef union U_INST64_B9 {
    6.43 +    IA64_INST inst;
    6.44 +    struct { u64 qp:6, imm20:20, :1, x6:6, :3, i:1, major:4; };
    6.45 +} INST64_B9;
    6.46 +
    6.47 +typedef union U_INST64_I19 {
    6.48 +    IA64_INST inst;
    6.49 +    struct { u64 qp:6, imm20:20, :1, x6:6, x3:3, i:1, major:4; };
    6.50 +} INST64_I19;
    6.51 +
    6.52 +typedef union U_INST64_I26 {
    6.53 +    IA64_INST inst;
    6.54 +    struct { u64 qp:6, :7, r2:7, ar3:7, x6:6, x3:3, :1, major:4;};
    6.55 +} INST64_I26;
    6.56 +
    6.57 +typedef union U_INST64_I27 {
    6.58 +    IA64_INST inst;
    6.59 +    struct { u64 qp:6, :7, imm:7, ar3:7, x6:6, x3:3, s:1, major:4;};
    6.60 +} INST64_I27;
    6.61 +
    6.62 +typedef union U_INST64_I28 { // not privileged (mov from AR)
    6.63 +    IA64_INST inst;
    6.64 +    struct { u64 qp:6, r1:7, :7, ar3:7, x6:6, x3:3, :1, major:4;};
    6.65 +} INST64_I28;
    6.66 +
    6.67 +typedef union U_INST64_M28 {
    6.68 +    IA64_INST inst;
    6.69 +    struct { u64 qp:6, :14, r3:7, x6:6, x3:3, :1, major:4;};
    6.70 +} INST64_M28;
    6.71 +
    6.72 +typedef union U_INST64_M29 {
    6.73 +    IA64_INST inst;
    6.74 +    struct { u64 qp:6, :7, r2:7, ar3:7, x6:6, x3:3, :1, major:4;};
    6.75 +} INST64_M29;
    6.76 +
    6.77 +typedef union U_INST64_M30 {
    6.78 +    IA64_INST inst;
    6.79 +    struct { u64 qp:6, :7, imm:7, ar3:7,x4:4,x2:2,x3:3,s:1,major:4;};
    6.80 +} INST64_M30;
    6.81 +
    6.82 +typedef union U_INST64_M31 {
    6.83 +    IA64_INST inst;
    6.84 +    struct { u64 qp:6, r1:7, :7, ar3:7, x6:6, x3:3, :1, major:4;};
    6.85 +} INST64_M31;
    6.86 +
    6.87 +typedef union U_INST64_M32 {
    6.88 +    IA64_INST inst;
    6.89 +    struct { u64 qp:6, :7, r2:7, cr3:7, x6:6, x3:3, :1, major:4;};
    6.90 +} INST64_M32;
    6.91 +
    6.92 +typedef union U_INST64_M33 {
    6.93 +    IA64_INST inst;
    6.94 +    struct { u64 qp:6, r1:7, :7, cr3:7, x6:6, x3:3, :1, major:4; };
    6.95 +} INST64_M33;
    6.96 +
    6.97 +typedef union U_INST64_M35 {
    6.98 +    IA64_INST inst;
    6.99 +    struct { u64 qp:6, :7, r2:7, :7, x6:6, x3:3, :1, major:4; };
   6.100 +    	
   6.101 +} INST64_M35;
   6.102 +
   6.103 +typedef union U_INST64_M36 {
   6.104 +    IA64_INST inst;
   6.105 +    struct { u64 qp:6, r1:7, :14, x6:6, x3:3, :1, major:4; }; 
   6.106 +} INST64_M36;
   6.107 +
   6.108 +typedef union U_INST64_M41 {
   6.109 +    IA64_INST inst;
   6.110 +    struct { u64 qp:6, :7, r2:7, :7, x6:6, x3:3, :1, major:4; }; 
   6.111 +} INST64_M41;
   6.112 +
   6.113 +typedef union U_INST64_M42 {
   6.114 +    IA64_INST inst;
   6.115 +    struct { u64 qp:6, :7, r2:7, r3:7, x6:6, x3:3, :1, major:4; };
   6.116 +} INST64_M42;
   6.117 +
   6.118 +typedef union U_INST64_M43 {
   6.119 +    IA64_INST inst;
   6.120 +    struct { u64 qp:6, r1:7, :7, r3:7, x6:6, x3:3, :1, major:4; };
   6.121 +} INST64_M43;
   6.122 +
   6.123 +typedef union U_INST64_M44 {
   6.124 +    IA64_INST inst;
   6.125 +    struct { u64 qp:6, imm:21, x4:4, i2:2, x3:3, i:1, major:4; };
   6.126 +} INST64_M44;
   6.127 +
   6.128 +typedef union U_INST64_M45 {
   6.129 +    IA64_INST inst;
   6.130 +    struct { u64 qp:6, :7, r2:7, r3:7, x6:6, x3:3, :1, major:4; };
   6.131 +} INST64_M45;
   6.132 +
   6.133 +typedef union U_INST64_M46 {
   6.134 +    IA64_INST inst;
   6.135 +    struct { u64 qp:6, r1:7, un7:7, r3:7, x6:6, x3:3, un1:1, major:4; };
   6.136 +} INST64_M46;
   6.137 +
   6.138 +typedef union U_INST64 {
   6.139 +    IA64_INST inst;
   6.140 +    struct { u64 :37, major:4; } generic;
   6.141 +    INST64_A5 A5;	// used in build_hypercall_bundle only
   6.142 +    INST64_B4 B4;	// used in build_hypercall_bundle only
   6.143 +    INST64_B8 B8;	// rfi, bsw.[01]
   6.144 +    INST64_B9 B9;	// break.b
   6.145 +    INST64_I19 I19;	// used in build_hypercall_bundle only
   6.146 +    INST64_I26 I26;	// mov register to ar (I unit)
   6.147 +    INST64_I27 I27;	// mov immediate to ar (I unit)
   6.148 +    INST64_I28 I28;	// mov from ar (I unit)
   6.149 +    INST64_M28 M28;	// purge translation cache entry
   6.150 +    INST64_M29 M29;	// mov register to ar (M unit)
   6.151 +    INST64_M30 M30;	// mov immediate to ar (M unit)
   6.152 +    INST64_M31 M31;	// mov from ar (M unit)
   6.153 +    INST64_M32 M32;	// mov reg to cr
   6.154 +    INST64_M33 M33;	// mov from cr
   6.155 +    INST64_M35 M35;	// mov to psr
   6.156 +    INST64_M36 M36;	// mov from psr
   6.157 +    INST64_M41 M41;	// translation cache insert
   6.158 +    INST64_M42 M42;	// mov to indirect reg/translation reg insert
   6.159 +    INST64_M43 M43;	// mov from indirect reg
   6.160 +    INST64_M44 M44;	// set/reset system mask
   6.161 +    INST64_M45 M45;	// translation purge
   6.162 +    INST64_M46 M46;	// translation access (tpa,tak)
   6.163 +} INST64;
   6.164 +
   6.165 +#define MASK_41 ((u64)0x1ffffffffff)
   6.166 +
   6.167 +long priv_verbose = 0;
   6.168 +#define verbose(a...) do { if (priv_verbose) printf(a); } while(0)
   6.169 +
   6.170 +/*
   6.171 + * privify_inst
   6.172 + *
   6.173 + * Replaces privilege-sensitive instructions (and reads from write-trapping
   6.174 + * registers) with privileged/trapping instructions as follows:
   6.175 + *	mov rx=ar.cflg -> mov ar.cflg=r(x+64) [**]
   6.176 + *	mov rx=ar.ky -> mov ar.ky=r(x+64)
   6.177 + *	fc rx -> ptc r(x+64)
   6.178 + *	thash rx=ry -> tak rx=r(y+64)
   6.179 + *	ttag rx=ry -> tpa rx=r(y+64)
   6.180 + *	mov rx=cpuid[ry] -> mov r(x+64)=rr[ry]
   6.181 + *	mov rx=pmd[ry] -> mov r(x+64)=pmc[ry] [**]
   6.182 + *	cover -> break.b 0x1fffff
   6.183 + *
   6.184 + * [**] not currently implemented
   6.185 + */
   6.186 +IA64_INST privify_inst(IA64_INST inst_val,
   6.187 +		IA64_SLOT_TYPE slot_type, IA64_BUNDLE *bp, char **msg)
   6.188 +{
   6.189 +	INST64 inst = *(INST64 *)&inst_val;
   6.190 +
   6.191 +	*msg = 0;
   6.192 +	switch (slot_type) {
   6.193 +	    case M:
   6.194 +		// FIXME: Also use for mov_to/from_ar.cflag (M29/M30) (IA32 only)
   6.195 +		if (inst.generic.major != 1) break;
   6.196 +		if (inst.M46.x3 != 0) break;
   6.197 +		if (inst.M31.x6 == 0x22 && inst.M31.ar3 < 8) {
   6.198 +			// mov r1=kr -> mov kr=r1+64
   6.199 +			verbose("privify_inst: privified mov r1=kr @%p\n",bp);
   6.200 +			if (inst.M31.r1 >= 64) *msg = "mov r1=kr w/r1>63";
   6.201 +			else privify_mov_from_kr_m(inst);
   6.202 +			break;
   6.203 +		}
   6.204 +		if (inst.M29.x6 == 0x2a && inst.M29.ar3 < 8)  {// mov kr=r1
   6.205 +			if (inst.M29.r2 >= 64) *msg = "mov kr=r2 w/r2>63";
   6.206 +			break;
   6.207 +		}
   6.208 +		if (inst.M28.x6 == 0x30) {
   6.209 +			// fc r3-> ptc r3+64
   6.210 +			verbose("privify_inst: privified fc r3 @%p\n",bp);
   6.211 +			if (inst.M28.r3 >= 64) *msg = "fc r3 w/r3>63";
   6.212 +			else privify_fc(inst);
   6.213 +			break;
   6.214 +		}
   6.215 +		if (inst.M28.x6 == 0x34) {
   6.216 +			if (inst.M28.r3 >= 64) *msg = "ptc.e w/r3>63";
   6.217 +			break;
   6.218 +		}
   6.219 +		if (inst.M46.un7 != 0) break;
   6.220 +		if (inst.M46.un1 != 0) break;
   6.221 +		if (inst.M46.x6 == 0x1a)  { // thash -> tak r1=r3+64
   6.222 +			verbose("privify_inst: privified thash @%p\n",bp);
   6.223 +			if (inst.M46.r3 >= 64) *msg = "thash w/r3>63";
   6.224 +			else privify_thash(inst);
   6.225 +		}
   6.226 +		else if (inst.M46.x6 == 0x1b)  { // ttag -> tpa r1=r3+64
   6.227 +			verbose("privify_inst: privified ttag @%p\n",bp);
   6.228 +			if (inst.M46.r3 >= 64) *msg = "ttag w/r3>63";
   6.229 +			else privify_ttag(inst);
   6.230 +		}
   6.231 +		else if (inst.M43.x6 == 0x17) {
   6.232 +			verbose("privify_inst: privified mov_from_cpuid @%p\n",bp);
   6.233 +			if (inst.M43.r1 >= 64) *msg = "mov_from_cpuid w/r1>63";
   6.234 +			else privify_mov_from_cpuid(inst);
   6.235 +		}
   6.236 +		else if (inst.M46.x6 == 0x1e)  { // tpa
   6.237 +			if (inst.M46.r3 >= 64) *msg = "tpa w/r3>63";
   6.238 +		}
   6.239 +		else if (inst.M46.x6 == 0x1f)  { // tak
   6.240 +			if (inst.M46.r3 >= 64) *msg = "tak w/r3>63";
   6.241 +		}
   6.242 +		else if (inst.M43.x6 == 0x10) {
   6.243 +			if (inst.M43.r1 >= 64) *msg = "mov_to_rr w/r1>63";
   6.244 +		}
   6.245 +		break;
   6.246 +	    case B:
   6.247 +		if (inst.generic.major != 0) break;
   6.248 +		if (inst.B8.x6 == 0x2) { // cover -> break.b 0x1fffff
   6.249 +			if (inst.B8.un21 != 0) break;
   6.250 +			if (inst.B8.un4 != 0) break;
   6.251 +			privify_cover(inst);
   6.252 +			verbose("privify_inst: privified cover @%p\n",bp);
   6.253 +		}
   6.254 +		if (inst.B9.x6 == 0x0) { // (p15) break.b 0x1fffff -> cover
   6.255 +			if (inst.B9.qp != 15) break;
   6.256 +			if (inst.B9.imm20 != 0xfffff) break;
   6.257 +			if (inst.B9.i != 1) break;
   6.258 +			inst.B8.x6 = 0x2;
   6.259 +			inst.B8.un21 = 0;
   6.260 +			inst.B8.un4 = 0;
   6.261 +			inst.B8.qp = 0;
   6.262 +			verbose("privify_inst: unprivified pseudo-cover @%p\n",
   6.263 +					bp);
   6.264 +		}
   6.265 +		break;
   6.266 +	    case I:	// only used for privifying mov_from_ar
   6.267 +		// FIXME: Also use for mov_to/from_ar.cflag (I26/I27) (IA32 only)
   6.268 +		if (inst.generic.major != 0) break;
   6.269 +		if (inst.I28.x6 == 0x32 && !inst.I28.x3 && inst.I28.ar3 < 8) {
   6.270 +			// mov r1=kr -> mov kr=r1+64
   6.271 +			verbose("privify_inst: privified mov r1=kr @%p\n",bp);
   6.272 +			if (inst.I28.r1 >= 64) *msg = "mov r1=kr w/r1>63";
   6.273 +			else privify_mov_from_kr_i(inst);
   6.274 +		}
   6.275 +		else if (inst.I26.x6 == 0x2a && !inst.I26.x3 &&
   6.276 +		    inst.I26.ar3 < 8)  {// mov kr=r1
   6.277 +			if (inst.I26.r2 >= 64) *msg = "mov kr=r2 w/r2>63";
   6.278 +		}
   6.279 +		break;
   6.280 +	    case F: case L: case ILLEGAL:
   6.281 +		break;
   6.282 +	}
   6.283 +	return *(IA64_INST *)&inst;
   6.284 +}
   6.285 +
   6.286 +#define read_slot1(b)	    (((b.i64[0]>>46L) | (b.i64[1]<<18UL)) & MASK_41)
   6.287 +// Not sure why, but this more obvious definition of read_slot1 doesn't work
   6.288 +// because the compiler treats (b.slot1b<<18UL) as a signed 32-bit integer
   6.289 +// so not enough bits get used and it gets sign extended to boot!
   6.290 +//#define read_slot1(b)	    ((b.slot1a | (b.slot1b<<18UL)) & MASK_41)
   6.291 +#define write_slot1(b,inst) do { b.slot1a=inst;b.slot1b=inst>>18UL;} while (0)
   6.292 +
   6.293 +
   6.294 +void privify_memory(void *start, unsigned long len)
   6.295 +{
   6.296 +	IA64_BUNDLE bundle, *bp = (IA64_BUNDLE *)start;
   6.297 +	IA64_INST tmp;
   6.298 +	char *msg;
   6.299 +
   6.300 +printf("privifying %ld bytes of memory at %p\n",len,start);
   6.301 +	if ((unsigned long)start & 0xfL) {
   6.302 +		printf("unaligned memory block in privify_memory\n");
   6.303 +	}
   6.304 +	len &= ~0xf;
   6.305 +	for (bundle = *bp; len; len -= 16) {
   6.306 +	    switch(bundle.template) {
   6.307 +		case 0x06: case 0x07: case 0x14: case 0x15:
   6.308 +		case 0x1a: case 0x1b: case 0x1e: case 0x1f:
   6.309 +			break;
   6.310 +		case 0x16: case 0x17:
   6.311 +			// may be B in slot0/1 but cover can only be slot2
   6.312 +			bundle.slot2 = privify_inst(bundle.slot2,B,bp,&msg);
   6.313 +			break;
   6.314 +		case 0x00: case 0x01: case 0x02: case 0x03:
   6.315 +			tmp = privify_inst(read_slot1(bundle),I,bp,&msg);
   6.316 +			write_slot1(bundle,tmp);
   6.317 +		case 0x0c: case 0x0d:
   6.318 +			bundle.slot2 = privify_inst(bundle.slot2,I,bp,&msg);
   6.319 +		case 0x04: case 0x05:
   6.320 +			// could a privified cover be in slot2 here?
   6.321 +			bundle.slot0 = privify_inst(bundle.slot0,M,bp,&msg);
   6.322 +			break;
   6.323 +		case 0x08: case 0x09: case 0x0a: case 0x0b:
   6.324 +			bundle.slot2 = privify_inst(bundle.slot2,I,bp,&msg);
   6.325 +		case 0x0e: case 0x0f:
   6.326 +			bundle.slot0 = privify_inst(bundle.slot0,M,bp,&msg);
   6.327 +			if (msg) break;
   6.328 +			tmp = privify_inst(read_slot1(bundle),M,bp,&msg);
   6.329 +			write_slot1(bundle,tmp);
   6.330 +			break;
   6.331 +		case 0x10: case 0x11:
   6.332 +			tmp = privify_inst(read_slot1(bundle),I,bp,&msg);
   6.333 +			write_slot1(bundle,tmp);
   6.334 +		case 0x12: case 0x13:
   6.335 +			// may be B in slot1 but cover can only be slot2
   6.336 +		case 0x1c: case 0x1d:
   6.337 +			bundle.slot0 = privify_inst(bundle.slot0,M,bp,&msg);
   6.338 +			if (msg) break;
   6.339 +			bundle.slot2 = privify_inst(bundle.slot2,B,bp,&msg);
   6.340 +			break;
   6.341 +		case 0x18: case 0x19:
   6.342 +			bundle.slot0 = privify_inst(bundle.slot0,M,bp,&msg);
   6.343 +			if (msg) break;
   6.344 +			tmp = privify_inst(read_slot1(bundle),M,bp,&msg);
   6.345 +			write_slot1(bundle,tmp);
   6.346 +			if (msg) break;
   6.347 +			bundle.slot2 = privify_inst(bundle.slot2,B,bp,&msg);
   6.348 +			break;
   6.349 +	    }
   6.350 +	    if (msg) {
   6.351 +		if (bundle.slot2)
   6.352 +			printf("privify_memory: %s @%p\n",msg,bp);
   6.353 +		else
   6.354 +			printf("privify_memory: %s @%p probably not insts\n",
   6.355 +				msg,bp);
   6.356 +		printf("privify_memory: bundle=%p,%p\n",
   6.357 +			bundle.i64[1],bundle.i64[0]);
   6.358 +	    }
   6.359 +	    *bp = bundle;
   6.360 +	    bundle = *++bp;
   6.361 +	}
   6.362 +
   6.363 +}
     7.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     7.2 +++ b/xen/arch/ia64/tools/privify/privify.h	Tue Apr 05 16:27:02 2005 +0000
     7.3 @@ -0,0 +1,34 @@
     7.4 +/*
     7.5 + * Binary translate privilege-sensitive ops to privileged
     7.6 + *
     7.7 + * Copyright (C) 2004 Hewlett-Packard Co.
     7.8 + *      Dan Magenheimer (dan.magenheimer@hp.com)
     7.9 + *
    7.10 + */
    7.11 +
    7.12 +/*
    7.13 + * Macros to replace privilege-sensitive instructions (and reads from
    7.14 + * write-trapping registers) with privileged/trapping instructions as follows:
    7.15 + *	mov rx=ar.cflg -> mov ar.cflg=r(x+64) [**]
    7.16 + *	mov rx=ar.ky -> mov ar.ky=r(x+64)
    7.17 + *	fc rx -> ptc r(x+64)
    7.18 + *	thash rx=ry -> tak rx=r(y+64)
    7.19 + *	ttag rx=ry -> tpa rx=r(y+64)
    7.20 + *	mov rx=cpuid[ry] -> mov r(x+64)=rr[ry]
    7.21 + *	mov rx=pmd[ry] -> mov r(x+64)=pmc[ry] [**]
    7.22 + *	cover -> break.b 0x1fffff
    7.23 + *  [**] not implemented yet
    7.24 + */
    7.25 +
    7.26 +#define notimpl(s) printk(s##" not implemented");
    7.27 +#define privify_mov_from_cflg_m(i) do { notimpl("mov from ar.cflg"); } while(0)
    7.28 +#define privify_mov_from_cflg_i(i) do { notimpl("mov from ar.cflg"); } while(0)
    7.29 +#define privify_mov_from_kr_m(i) do { i.M31.x6 = 0x2a; i.M29.r2 = i.M31.r1 + 64; } while(0)
    7.30 +#define privify_mov_from_kr_i(i) do { i.I28.x6 = 0x2a; i.I26.r2 = i.I28.r1 + 64; } while(0)
    7.31 +#define privify_fc(i) do { i.M28.x6 = 0x34; i.M28.r3 = i.M28.r3 + 64; } while(0)
    7.32 +#define privify_thash(i) do { i.M46.x6 = 0x1f; i.M46.r3 += 64; } while(0)
    7.33 +#define privify_ttag(i) do { i.M46.x6 = 0x1f; i.M46.r3 += 64; } while(0)
    7.34 +#define privify_mov_from_cpuid(i) do { i.M43.x6 = 0x10; i.M43.r1 += 64; } while(0)
    7.35 +#define privify_mov_from_pmd(i) do { notimpl("mov from pmd"); } while(0)
    7.36 +#define privify_cover(x) do { x.B8.x6 = 0x0; x.B9.imm20 = 0xfffff; x.B9.i = 0x1; } while(0)
    7.37 +
     8.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     8.2 +++ b/xen/arch/ia64/tools/privify/privify_elf64.c	Tue Apr 05 16:27:02 2005 +0000
     8.3 @@ -0,0 +1,120 @@
     8.4 +/*
     8.5 + * Binary translate privilege-sensitive ops to privileged
     8.6 + *
     8.7 + * Copyright (C) 2004 Hewlett-Packard Co.
     8.8 + *      Dan Magenheimer (dan.magenheimer@hp.com)
     8.9 + *
    8.10 + */
    8.11 +
    8.12 +#include <fcntl.h>
    8.13 +#include <stdio.h>
    8.14 +#include <stdlib.h>
    8.15 +#define ELFSIZE 64
    8.16 +#include <linux/elf.h>
    8.17 +
    8.18 +#define MAX_FILSIZ (32*1024*1024)
    8.19 +unsigned long buf[MAX_FILSIZ/sizeof(unsigned long)];
    8.20 +
    8.21 +static void
    8.22 +usage (FILE *fp)
    8.23 +{
    8.24 +	fprintf(fp, "Usage: privify elf64filein elf64fileout\n");
    8.25 +}
    8.26 +
    8.27 +static void
    8.28 +panic (char *s)
    8.29 +{
    8.30 +	fprintf(stderr, "panic: %s\n",s);
    8.31 +	exit(1);
    8.32 +}
    8.33 +
    8.34 +static int
    8.35 +read_file(const char *in_path, char *buf, int maxsize)
    8.36 +{
    8.37 +	ssize_t nread, totread = 0, ssize_inc = 8192;
    8.38 +	int from;
    8.39 +
    8.40 +	if ((from = open (in_path, O_RDONLY)) < 0) return -1;
    8.41 +	maxsize -= ssize_inc; // create safety zone
    8.42 +	if (maxsize < 0) panic("input file exceeds max size");
    8.43 +	while ((nread = read(from, buf, ssize_inc)) > 0) {
    8.44 +		if (nread < 0) return -1; // problem
    8.45 +		totread += nread;
    8.46 +		if (nread < ssize_inc) return totread; // done
    8.47 +		buf += ssize_inc;
    8.48 +		if (totread > maxsize) // buffer too small
    8.49 +			panic("file exceeds max size\n");
    8.50 +	}
    8.51 +	return totread;
    8.52 +}
    8.53 +
    8.54 +static int
    8.55 +write_file(const char *out_path, char *buf, int size)
    8.56 +{
    8.57 +	int to;
    8.58 +
    8.59 +	if ((to = open(out_path, O_WRONLY|O_CREAT|O_EXCL,0644)) < 0)
    8.60 +		return -1;
    8.61 +
    8.62 +	if (write(to,buf,size) < 0) return -1;
    8.63 +
    8.64 +	return 0;
    8.65 +}
    8.66 +
    8.67 +#define IS_ELF(ehdr) ((ehdr).e_ident[EI_MAG0] == ELFMAG0 && \
    8.68 +                      (ehdr).e_ident[EI_MAG1] == ELFMAG1 && \
    8.69 +                      (ehdr).e_ident[EI_MAG2] == ELFMAG2 && \
    8.70 +                      (ehdr).e_ident[EI_MAG3] == ELFMAG3)
    8.71 +
    8.72 +
    8.73 +static void
    8.74 +privify_elf(char *elfbase)
    8.75 +{
    8.76 +	Elf64_Ehdr *ehdr = (Elf64_Ehdr *)elfbase;
    8.77 +	Elf64_Phdr *phdr;
    8.78 +	Elf64_Shdr *shdr;
    8.79 +	char *elfaddr;
    8.80 +	unsigned long size;
    8.81 +	int h;
    8.82 +
    8.83 +	if ( !IS_ELF(*ehdr) )
    8.84 +		panic("Kernel image does not have an ELF header.\n");
    8.85 +	for ( h = 0; h < ehdr->e_phnum; h++ ) {
    8.86 +		phdr = (Elf64_Phdr *)(elfbase +
    8.87 +			ehdr->e_phoff + (h*ehdr->e_phentsize));
    8.88 +		printf("h=%d, phdr=%p,phdr->p_type=%lx",h,phdr,phdr->p_type);
    8.89 +		if ((phdr->p_type != PT_LOAD)) {
    8.90 +			printf("\n");
    8.91 +			continue;
    8.92 +		}
    8.93 +		size = phdr->p_filesz;
    8.94 +		elfaddr = elfbase + phdr->p_offset;
    8.95 +		printf(",elfaddr=%p,size=%d,phdr->p_flags=%lx\n",
    8.96 +			elfaddr,size,phdr->p_flags);
    8.97 +		if (phdr->p_flags & PF_X) privify_memory(elfaddr,size);
    8.98 +    	}
    8.99 +}
   8.100 +
   8.101 +int
   8.102 +main(int argc, char **argv)
   8.103 +{
   8.104 +	char *in_path, *out_path;
   8.105 +	int fsize;
   8.106 +
   8.107 +	if (argc != 3) {
   8.108 +		usage(stdout);
   8.109 +		exit(1);
   8.110 +	}
   8.111 +	in_path = argv[1];
   8.112 +	out_path = argv[2];
   8.113 +	if ((fsize = read_file(in_path,(char *)buf,MAX_FILSIZ)) < 0) {
   8.114 +		perror("read_file");
   8.115 +		panic("failed");
   8.116 +	}
   8.117 +	privify_elf((char *)buf);
   8.118 +	fflush(stdout);
   8.119 +	if (write_file(out_path,(char *)buf,fsize) < 0) {
   8.120 +		perror("write_file");
   8.121 +		panic("failed");
   8.122 +	}
   8.123 +}
     9.1 --- a/xen/arch/ia64/xensetup.c	Tue Apr 05 15:53:37 2005 +0000
     9.2 +++ b/xen/arch/ia64/xensetup.c	Tue Apr 05 16:27:02 2005 +0000
     9.3 @@ -258,7 +258,8 @@ printk("About to call do_createdomain()\
     9.4  printk("About to call init_idle_task()\n");
     9.5      init_task.domain = &idle0_domain;
     9.6      init_task.processor = 0;
     9.7 -    init_task.mm = &init_mm;
     9.8 +//    init_task.mm = &init_mm;
     9.9 +    init_task.domain->arch.mm = &init_mm;
    9.10  //    init_task.thread = INIT_THREAD;
    9.11      init_idle_task();
    9.12      //arch_do_createdomain(current);
    10.1 --- a/xen/include/asm-ia64/vhpt.h	Tue Apr 05 15:53:37 2005 +0000
    10.2 +++ b/xen/include/asm-ia64/vhpt.h	Tue Apr 05 16:27:02 2005 +0000
    10.3 @@ -135,7 +135,7 @@ struct vhpt_lf_entry {
    10.4  // VHPT_CCHAIN_LOOKUP is intended to run with psr.i+ic off
    10.5  #define VHPT_CCHAIN_LOOKUP(Name, i_or_d) 			\
    10.6  								\
    10.7 -Name:;								\
    10.8 +CC_##Name:;							\
    10.9  	mov r31 = pr;						\
   10.10  	mov r16 = cr.ifa;					\
   10.11  	movl r30 = int_counts;					\
    11.1 --- a/xen/include/xen/sched.h	Tue Apr 05 15:53:37 2005 +0000
    11.2 +++ b/xen/include/xen/sched.h	Tue Apr 05 16:27:02 2005 +0000
    11.3 @@ -68,10 +68,6 @@ struct exec_domain
    11.4      struct exec_domain *ed_next_list;
    11.5      int eid;
    11.6  
    11.7 -#ifdef ARCH_HAS_EXEC_DOMAIN_MM_PTR
    11.8 -    struct mm_struct *mm;
    11.9 -#endif
   11.10 -
   11.11      struct ac_timer  timer;         /* one-shot timer for timeout values */
   11.12      unsigned long    sleep_tick;    /* tick at which this vcpu started sleep */
   11.13