direct-io.hg

changeset 12915:ae1f00361a8e

[XEN][POWERPC] Backoff the SCOM stuff by default
Sadly the SCOM stuff is proving to be unstable for various versions of
the chip. I'm turning it off by default. Also adding some PVR
decoding logic.
Signed-off-by: Jimi Xenidis <jimix@watson.ibm.com>
Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com>
author Jimi Xenidis <jimix@watson.ibm.com>
date Tue Sep 26 12:42:33 2006 -0400 (2006-09-26)
parents 61179af7868d
children 539355c03a30
files xen/arch/powerpc/powerpc64/ppc970_scom.c xen/include/asm-powerpc/processor.h
line diff
     1.1 --- a/xen/arch/powerpc/powerpc64/ppc970_scom.c	Mon Sep 25 11:19:55 2006 -0400
     1.2 +++ b/xen/arch/powerpc/powerpc64/ppc970_scom.c	Tue Sep 26 12:42:33 2006 -0400
     1.3 @@ -24,8 +24,11 @@
     1.4  #include <xen/console.h>
     1.5  #include <xen/errno.h>
     1.6  #include <asm/delay.h>
     1.7 +#include <asm/processor.h>
     1.8  #include "scom.h"
     1.9  
    1.10 +#undef CONFIG_SCOM
    1.11 +
    1.12  #define SPRN_SCOMC 276
    1.13  #define SPRN_SCOMD 277
    1.14  #define SCOMC_READ 1
    1.15 @@ -153,19 +156,29 @@ int cpu_scom_write(uint addr, ulong d)
    1.16  
    1.17  void cpu_scom_init(void)
    1.18  {
    1.19 +#ifdef CONFIG_SCOM
    1.20      ulong val;
    1.21 -    console_start_sync();
    1.22 -    if (!cpu_scom_read(SCOM_PTSR, &val))
    1.23 -        printk("SCOM PTSR: 0x%016lx\n", val);
    1.24 +    if (PVR_REV(mfpvr()) == 0x0300) {
    1.25 +        /* these address are only good for 970FX */
    1.26 +        console_start_sync();
    1.27 +        if (!cpu_scom_read(SCOM_PTSR, &val))
    1.28 +            printk("SCOM PTSR: 0x%016lx\n", val);
    1.29  
    1.30 -    console_end_sync();
    1.31 +        console_end_sync();
    1.32 +    }
    1.33 +#endif
    1.34  }
    1.35  
    1.36  void cpu_scom_AMCR(void)
    1.37  {
    1.38 +#ifdef CONFIG_SCOM
    1.39      ulong val;
    1.40  
    1.41 -    cpu_scom_read(SCOM_AMC_REG, &val);
    1.42 -    printk("SCOM AMCR: 0x%016lx\n", val);
    1.43 +    if (PVR_REV(mfpvr()) == 0x0300) {
    1.44 +        /* these address are only good for 970FX */
    1.45 +        cpu_scom_read(SCOM_AMC_REG, &val);
    1.46 +        printk("SCOM AMCR: 0x%016lx\n", val);
    1.47 +    }
    1.48 +#endif
    1.49  }
    1.50  
     2.1 --- a/xen/include/asm-powerpc/processor.h	Mon Sep 25 11:19:55 2006 -0400
     2.2 +++ b/xen/include/asm-powerpc/processor.h	Tue Sep 26 12:42:33 2006 -0400
     2.3 @@ -31,6 +31,85 @@
     2.4  /* most assembler do not know this instruction */
     2.5  #define HRFID .long 0x4c000224
     2.6  
     2.7 +/* Processor Version Register (PVR) field extraction */
     2.8 +
     2.9 +#define PVR_VER(pvr)	(((pvr) >>  16) & 0xFFFF)	/* Version field */
    2.10 +#define PVR_REV(pvr)	(((pvr) >>   0) & 0xFFFF)	/* Revison field */
    2.11 +
    2.12 +#define __is_processor(pv)	(PVR_VER(mfspr(SPRN_PVR)) == (pv))
    2.13 +
    2.14 +/*
    2.15 + * IBM has further subdivided the standard PowerPC 16-bit version and
    2.16 + * revision subfields of the PVR for the PowerPC 403s into the following:
    2.17 + */
    2.18 +
    2.19 +#define PVR_FAM(pvr)	(((pvr) >> 20) & 0xFFF)	/* Family field */
    2.20 +#define PVR_MEM(pvr)	(((pvr) >> 16) & 0xF)	/* Member field */
    2.21 +#define PVR_CORE(pvr)	(((pvr) >> 12) & 0xF)	/* Core field */
    2.22 +#define PVR_CFG(pvr)	(((pvr) >>  8) & 0xF)	/* Configuration field */
    2.23 +#define PVR_MAJ(pvr)	(((pvr) >>  4) & 0xF)	/* Major revision field */
    2.24 +#define PVR_MIN(pvr)	(((pvr) >>  0) & 0xF)	/* Minor revision field */
    2.25 +
    2.26 +/* Processor Version Numbers */
    2.27 +
    2.28 +#define PVR_403GA	0x00200000
    2.29 +#define PVR_403GB	0x00200100
    2.30 +#define PVR_403GC	0x00200200
    2.31 +#define PVR_403GCX	0x00201400
    2.32 +#define PVR_405GP	0x40110000
    2.33 +#define PVR_STB03XXX	0x40310000
    2.34 +#define PVR_NP405H	0x41410000
    2.35 +#define PVR_NP405L	0x41610000
    2.36 +#define PVR_601		0x00010000
    2.37 +#define PVR_602		0x00050000
    2.38 +#define PVR_603		0x00030000
    2.39 +#define PVR_603e	0x00060000
    2.40 +#define PVR_603ev	0x00070000
    2.41 +#define PVR_603r	0x00071000
    2.42 +#define PVR_604		0x00040000
    2.43 +#define PVR_604e	0x00090000
    2.44 +#define PVR_604r	0x000A0000
    2.45 +#define PVR_620		0x00140000
    2.46 +#define PVR_740		0x00080000
    2.47 +#define PVR_750		PVR_740
    2.48 +#define PVR_740P	0x10080000
    2.49 +#define PVR_750P	PVR_740P
    2.50 +#define PVR_7400	0x000C0000
    2.51 +#define PVR_7410	0x800C0000
    2.52 +#define PVR_7450	0x80000000
    2.53 +#define PVR_8540	0x80200000
    2.54 +#define PVR_8560	0x80200000
    2.55 +/*
    2.56 + * For the 8xx processors, all of them report the same PVR family for
    2.57 + * the PowerPC core. The various versions of these processors must be
    2.58 + * differentiated by the version number in the Communication Processor
    2.59 + * Module (CPM).
    2.60 + */
    2.61 +#define PVR_821		0x00500000
    2.62 +#define PVR_823		PVR_821
    2.63 +#define PVR_850		PVR_821
    2.64 +#define PVR_860		PVR_821
    2.65 +#define PVR_8240	0x00810100
    2.66 +#define PVR_8245	0x80811014
    2.67 +#define PVR_8260	PVR_8240
    2.68 +
    2.69 +/* 64-bit processors */
    2.70 +/* XXX the prefix should be PVR_, we'll do a global sweep to fix it one day */
    2.71 +#define PV_NORTHSTAR	0x0033
    2.72 +#define PV_PULSAR	0x0034
    2.73 +#define PV_POWER4	0x0035
    2.74 +#define PV_ICESTAR	0x0036
    2.75 +#define PV_SSTAR	0x0037
    2.76 +#define PV_POWER4p	0x0038
    2.77 +#define PV_970		0x0039
    2.78 +#define PV_POWER5	0x003A
    2.79 +#define PV_POWER5p	0x003B
    2.80 +#define PV_970FX	0x003C
    2.81 +#define PV_630		0x0040
    2.82 +#define PV_630p	0x0041
    2.83 +#define PV_970MP	0x0044
    2.84 +#define PV_BE		0x0070
    2.85 +
    2.86  #ifndef __ASSEMBLY__ 
    2.87  #include <xen/types.h>
    2.88