direct-io.hg

changeset 12276:9fbb26d47b83

[HVM] VLAPIC cleanups. vlapic tsruct is statically contained
inside the vcpu structure.
Signed-off-by: Keir Fraser <keir@xensource.com>
author kfraser@localhost.localdomain
date Tue Nov 07 15:48:10 2006 +0000 (2006-11-07)
parents 9a6fb3e2f12d
children cba947bc8450
files xen/arch/x86/hvm/svm/svm.c xen/arch/x86/hvm/vioapic.c xen/arch/x86/hvm/vlapic.c xen/arch/x86/hvm/vmx/io.c xen/arch/x86/hvm/vmx/vmx.c xen/include/asm-x86/hvm/vcpu.h xen/include/asm-x86/hvm/vlapic.h
line diff
     1.1 --- a/xen/arch/x86/hvm/svm/svm.c	Tue Nov 07 13:13:52 2006 +0000
     1.2 +++ b/xen/arch/x86/hvm/svm/svm.c	Tue Nov 07 15:48:10 2006 +0000
     1.3 @@ -855,8 +855,7 @@ static void svm_migrate_timers(struct vc
     1.4          migrate_timer(&pt->timer, v->processor);
     1.5          migrate_timer(&v->arch.hvm_vcpu.hlt_timer, v->processor);
     1.6      }
     1.7 -    if ( VLAPIC(v) != NULL )
     1.8 -        migrate_timer(&VLAPIC(v)->vlapic_timer, v->processor);
     1.9 +    migrate_timer(&vcpu_vlapic(v)->vlapic_timer, v->processor);
    1.10      migrate_timer(&vrtc->second_timer, v->processor);
    1.11      migrate_timer(&vrtc->second_timer2, v->processor);
    1.12      migrate_timer(&vpmt->timer, v->processor);
    1.13 @@ -984,7 +983,7 @@ static void svm_vmexit_do_cpuid(struct v
    1.14          cpuid(input, &eax, &ebx, &ecx, &edx);       
    1.15          if (input == 0x00000001 || input == 0x80000001 )
    1.16          {
    1.17 -            if ( !vlapic_global_enabled((VLAPIC(v))) )
    1.18 +            if ( !vlapic_global_enabled(vcpu_vlapic(v)) )
    1.19              {
    1.20                  /* Since the apic is disabled, avoid any confusion 
    1.21                     about SMP cpus being available */
    1.22 @@ -1550,7 +1549,7 @@ static void mov_from_cr(int cr, int gp, 
    1.23  {
    1.24      unsigned long value = 0;
    1.25      struct vcpu *v = current;
    1.26 -    struct vlapic *vlapic = VLAPIC(v);
    1.27 +    struct vlapic *vlapic = vcpu_vlapic(v);
    1.28      struct vmcb_struct *vmcb;
    1.29  
    1.30      vmcb = v->arch.hvm_svm.vmcb;
    1.31 @@ -1577,8 +1576,6 @@ static void mov_from_cr(int cr, int gp, 
    1.32              printk("CR4 read=%lx\n", value);
    1.33          break;
    1.34      case 8:
    1.35 -        if ( vlapic == NULL )
    1.36 -            break;
    1.37          value = (unsigned long)vlapic_get_reg(vlapic, APIC_TASKPRI);
    1.38          value = (value & 0xF0) >> 4;
    1.39          break;
    1.40 @@ -1607,7 +1604,7 @@ static int mov_to_cr(int gpreg, int cr, 
    1.41      unsigned long value;
    1.42      unsigned long old_cr;
    1.43      struct vcpu *v = current;
    1.44 -    struct vlapic *vlapic = VLAPIC(v);
    1.45 +    struct vlapic *vlapic = vcpu_vlapic(v);
    1.46      struct vmcb_struct *vmcb = v->arch.hvm_svm.vmcb;
    1.47  
    1.48      ASSERT(vmcb);
    1.49 @@ -1747,8 +1744,6 @@ static int mov_to_cr(int gpreg, int cr, 
    1.50  
    1.51      case 8:
    1.52      {
    1.53 -        if ( vlapic == NULL )
    1.54 -            break;
    1.55          vlapic_set_reg(vlapic, APIC_TASKPRI, ((value & 0x0F) << 4));
    1.56          break;
    1.57      }
    1.58 @@ -1907,7 +1902,7 @@ static inline void svm_do_msr_access(
    1.59              msr_content = vmcb->sysenter_eip;
    1.60              break;
    1.61          case MSR_IA32_APICBASE:
    1.62 -            msr_content = VLAPIC(v) ? VLAPIC(v)->apic_base_msr : 0;
    1.63 +            msr_content = vcpu_vlapic(v)->apic_base_msr;
    1.64              break;
    1.65          default:
    1.66              if (long_mode_do_msr_read(regs))
    1.67 @@ -1946,7 +1941,7 @@ static inline void svm_do_msr_access(
    1.68              vmcb->sysenter_eip = msr_content;
    1.69              break;
    1.70          case MSR_IA32_APICBASE:
    1.71 -            vlapic_msr_set(VLAPIC(v), msr_content);
    1.72 +            vlapic_msr_set(vcpu_vlapic(v), msr_content);
    1.73              break;
    1.74          default:
    1.75              if ( !long_mode_do_msr_write(regs) )
     2.1 --- a/xen/arch/x86/hvm/vioapic.c	Tue Nov 07 13:13:52 2006 +0000
     2.2 +++ b/xen/arch/x86/hvm/vioapic.c	Tue Nov 07 15:48:10 2006 +0000
     2.3 @@ -430,7 +430,6 @@ static void ioapic_deliver(hvm_vioapic_t
     2.4      uint32_t deliver_bitmask;
     2.5      struct vlapic *target;
     2.6  
     2.7 -
     2.8      HVM_DBG_LOG(DBG_LEVEL_IOAPIC,
     2.9        "dest %x dest_mode %x delivery_mode %x vector %x trig_mode %x\n",
    2.10        dest, dest_mode, delivery_mode, vector, trig_mode);
    2.11 @@ -458,7 +457,7 @@ static void ioapic_deliver(hvm_vioapic_t
    2.12                                        vector, deliver_bitmask);
    2.13          if (target) {
    2.14              ioapic_inj_irq(s, target, vector, trig_mode, delivery_mode);
    2.15 -            vcpu_kick(target->vcpu);
    2.16 +            vcpu_kick(vlapic_vcpu(target));
    2.17          } else
    2.18              HVM_DBG_LOG(DBG_LEVEL_IOAPIC,
    2.19                "null round robin mask %x vector %x delivery_mode %x\n",
    2.20 @@ -482,7 +481,7 @@ static void ioapic_deliver(hvm_vioapic_t
    2.21                  target = s->lapic_info[bit];
    2.22              if (target) {
    2.23                  ioapic_inj_irq(s, target, vector, trig_mode, delivery_mode);
    2.24 -                vcpu_kick(target->vcpu);
    2.25 +                vcpu_kick(vlapic_vcpu(target));
    2.26              }
    2.27          }
    2.28          break;
     3.1 --- a/xen/arch/x86/hvm/vlapic.c	Tue Nov 07 13:13:52 2006 +0000
     3.2 +++ b/xen/arch/x86/hvm/vlapic.c	Tue Nov 07 15:48:10 2006 +0000
     3.3 @@ -157,7 +157,7 @@ int vlapic_set_irq(struct vlapic *vlapic
     3.4  
     3.5  s_time_t get_apictime_scheduled(struct vcpu *v)
     3.6  {
     3.7 -    struct vlapic *vlapic = VLAPIC(v);
     3.8 +    struct vlapic *vlapic = vcpu_vlapic(v);
     3.9  
    3.10      if ( !vlapic_lvt_enabled(vlapic, APIC_LVTT) )
    3.11          return -1;
    3.12 @@ -202,7 +202,7 @@ static int vlapic_match_dest(struct vcpu
    3.13                               int delivery_mode)
    3.14  {
    3.15      int result = 0;
    3.16 -    struct vlapic *target = VLAPIC(v);
    3.17 +    struct vlapic *target = vcpu_vlapic(v);
    3.18  
    3.19      HVM_DBG_LOG(DBG_LEVEL_VLAPIC, "target %p, source %p, dest 0x%x, "
    3.20                  "dest_mode 0x%x, short_hand 0x%x, delivery_mode 0x%x.",
    3.21 @@ -285,7 +285,7 @@ static int vlapic_accept_irq(struct vcpu
    3.22                               int vector, int level, int trig_mode)
    3.23  {
    3.24      int result = 0;
    3.25 -    struct vlapic *vlapic = VLAPIC(v);
    3.26 +    struct vlapic *vlapic = vcpu_vlapic(v);
    3.27  
    3.28      switch ( delivery_mode ) {
    3.29      case APIC_DM_FIXED:
    3.30 @@ -404,8 +404,7 @@ struct vlapic *apic_round_robin(struct d
    3.31  
    3.32          if ( test_bit(next, &bitmap) )
    3.33          {
    3.34 -            target = d->vcpu[next]->arch.hvm_vcpu.vlapic;
    3.35 -
    3.36 +            target = vcpu_vlapic(d->vcpu[next]);
    3.37              if ( target == NULL || !vlapic_enabled(target) )
    3.38              {
    3.39                  printk("warning: targe round robin local apic disabled\n");
    3.40 @@ -433,7 +432,7 @@ void vlapic_EOI_set(struct vlapic *vlapi
    3.41      vlapic_clear_vector(vector, vlapic->regs + APIC_ISR);
    3.42  
    3.43      if ( vlapic_test_and_clear_vector(vector, vlapic->regs + APIC_TMR) )
    3.44 -        ioapic_update_EOI(vlapic->domain, vector);
    3.45 +        ioapic_update_EOI(vlapic_domain(vlapic), vector);
    3.46  }
    3.47  
    3.48  static void vlapic_ipi(struct vlapic *vlapic)
    3.49 @@ -446,12 +445,12 @@ static void vlapic_ipi(struct vlapic *vl
    3.50      unsigned int trig_mode =    icr_low & APIC_INT_LEVELTRIG;
    3.51      unsigned int level =        icr_low & APIC_INT_ASSERT;
    3.52      unsigned int dest_mode =    icr_low & APIC_DEST_MASK;
    3.53 -    unsigned int delivery_mode =    icr_low & APIC_MODE_MASK;
    3.54 +    unsigned int delivery_mode =icr_low & APIC_MODE_MASK;
    3.55      unsigned int vector =       icr_low & APIC_VECTOR_MASK;
    3.56  
    3.57      struct vlapic *target;
    3.58 -    struct vcpu *v = NULL;
    3.59 -    uint32_t lpr_map=0;
    3.60 +    struct vcpu *v;
    3.61 +    uint32_t lpr_map = 0;
    3.62  
    3.63      HVM_DBG_LOG(DBG_LEVEL_VLAPIC, "icr_high 0x%x, icr_low 0x%x, "
    3.64                  "short_hand 0x%x, dest 0x%x, trig_mode 0x%x, level 0x%x, "
    3.65 @@ -459,7 +458,7 @@ static void vlapic_ipi(struct vlapic *vl
    3.66                  icr_high, icr_low, short_hand, dest,
    3.67                  trig_mode, level, dest_mode, delivery_mode, vector);
    3.68  
    3.69 -    for_each_vcpu ( vlapic->domain, v )
    3.70 +    for_each_vcpu ( vlapic_domain(vlapic), v )
    3.71      {
    3.72          if ( vlapic_match_dest(v, vlapic, short_hand,
    3.73                                 dest, dest_mode, delivery_mode) )
    3.74 @@ -474,11 +473,10 @@ static void vlapic_ipi(struct vlapic *vl
    3.75  
    3.76      if ( delivery_mode == APIC_DM_LOWEST)
    3.77      {
    3.78 -        v = vlapic->vcpu;
    3.79 -        target = apic_round_robin(v->domain, dest_mode, vector, lpr_map);
    3.80 -
    3.81 -        if ( target )
    3.82 -            vlapic_accept_irq(target->vcpu, delivery_mode,
    3.83 +        target = apic_round_robin(vlapic_domain(v), dest_mode,
    3.84 +                                  vector, lpr_map);
    3.85 +        if ( target != NULL )
    3.86 +            vlapic_accept_irq(vlapic_vcpu(target), delivery_mode,
    3.87                                vector, level, trig_mode);
    3.88      }
    3.89  }
    3.90 @@ -489,8 +487,6 @@ static uint32_t vlapic_get_tmcct(struct 
    3.91      s_time_t passed, now = NOW();
    3.92      uint32_t tmcct = vlapic_get_reg(vlapic, APIC_TMCCT);
    3.93  
    3.94 -    ASSERT(vlapic != NULL);
    3.95 -
    3.96      if ( unlikely(now <= vlapic->timer_last_update) )
    3.97      {
    3.98          passed = ~0x0LL - vlapic->timer_last_update + now;
    3.99 @@ -564,7 +560,7 @@ static unsigned long vlapic_read(struct 
   3.100      unsigned int alignment;
   3.101      unsigned int tmp;
   3.102      unsigned long result;
   3.103 -    struct vlapic *vlapic = VLAPIC(v);
   3.104 +    struct vlapic *vlapic = vcpu_vlapic(v);
   3.105      unsigned int offset = address - vlapic->base_address;
   3.106  
   3.107      if ( offset > APIC_TDCR)
   3.108 @@ -609,7 +605,7 @@ static unsigned long vlapic_read(struct 
   3.109  static void vlapic_write(struct vcpu *v, unsigned long address,
   3.110                           unsigned long len, unsigned long val)
   3.111  {
   3.112 -    struct vlapic *vlapic = VLAPIC(v);
   3.113 +    struct vlapic *vlapic = vcpu_vlapic(v);
   3.114      unsigned int offset = address - vlapic->base_address;
   3.115  
   3.116      if ( offset != 0xb0 )
   3.117 @@ -741,7 +737,7 @@ static void vlapic_write(struct vcpu *v,
   3.118  
   3.119          vlapic_set_reg(vlapic, offset, val);
   3.120  
   3.121 -        if ( !vlapic->vcpu->vcpu_id && (offset == APIC_LVT0) )
   3.122 +        if ( (vlapic_vcpu(vlapic)->vcpu_id == 0) && (offset == APIC_LVT0) )
   3.123          {
   3.124              if ( (val & APIC_MODE_MASK) == APIC_DM_EXTINT )
   3.125                  if ( val & APIC_LVT_MASKED)
   3.126 @@ -803,7 +799,7 @@ static void vlapic_write(struct vcpu *v,
   3.127  
   3.128  static int vlapic_range(struct vcpu *v, unsigned long addr)
   3.129  {
   3.130 -    struct vlapic *vlapic = VLAPIC(v);
   3.131 +    struct vlapic *vlapic = vcpu_vlapic(v);
   3.132  
   3.133      return (vlapic_global_enabled(vlapic) &&
   3.134              (addr >= vlapic->base_address) &&
   3.135 @@ -818,12 +814,6 @@ struct hvm_mmio_handler vlapic_mmio_hand
   3.136  
   3.137  void vlapic_msr_set(struct vlapic *vlapic, uint64_t value)
   3.138  {
   3.139 -    if ( vlapic == NULL )
   3.140 -        return;
   3.141 -
   3.142 -    if ( vlapic->vcpu->vcpu_id )
   3.143 -        value &= ~MSR_IA32_APICBASE_BSP;
   3.144 -
   3.145      vlapic->apic_base_msr = value;
   3.146      vlapic->base_address  = vlapic->apic_base_msr & MSR_IA32_APICBASE_BASE;
   3.147  
   3.148 @@ -840,7 +830,6 @@ void vlapic_msr_set(struct vlapic *vlapi
   3.149  void vlapic_timer_fn(void *data)
   3.150  {
   3.151      struct vlapic *vlapic = data;
   3.152 -    struct vcpu *v;
   3.153      uint32_t timer_vector;
   3.154      s_time_t now;
   3.155  
   3.156 @@ -848,7 +837,6 @@ void vlapic_timer_fn(void *data)
   3.157                    !vlapic_lvt_enabled(vlapic, APIC_LVTT)) )
   3.158          return;
   3.159  
   3.160 -    v = vlapic->vcpu;
   3.161      timer_vector = vlapic_lvt_vector(vlapic, APIC_LVTT);
   3.162      now = NOW();
   3.163  
   3.164 @@ -882,14 +870,14 @@ void vlapic_timer_fn(void *data)
   3.165  
   3.166  int vlapic_accept_pic_intr(struct vcpu *v)
   3.167  {
   3.168 -    struct vlapic *vlapic = VLAPIC(v);
   3.169 +    struct vlapic *vlapic = vcpu_vlapic(v);
   3.170  
   3.171      return vlapic ? test_bit(_VLAPIC_BSP_ACCEPT_PIC, &vlapic->status) : 1;
   3.172  }
   3.173  
   3.174  int cpu_get_apic_interrupt(struct vcpu *v, int *mode)
   3.175  {
   3.176 -    struct vlapic *vlapic = VLAPIC(v);
   3.177 +    struct vlapic *vlapic = vcpu_vlapic(v);
   3.178      int highest_irr;
   3.179  
   3.180      if ( !vlapic || !vlapic_enabled(vlapic) )
   3.181 @@ -923,7 +911,7 @@ int cpu_has_pending_irq(struct vcpu *v)
   3.182  
   3.183  void vlapic_post_injection(struct vcpu *v, int vector, int deliver_mode)
   3.184  {
   3.185 -    struct vlapic *vlapic = VLAPIC(v);
   3.186 +    struct vlapic *vlapic = vcpu_vlapic(v);
   3.187  
   3.188      if ( unlikely(vlapic == NULL) )
   3.189          return;
   3.190 @@ -961,11 +949,9 @@ void vlapic_post_injection(struct vcpu *
   3.191  
   3.192  static int vlapic_reset(struct vlapic *vlapic)
   3.193  {
   3.194 -    struct vcpu *v = vlapic->vcpu;
   3.195 +    struct vcpu *v = vlapic_vcpu(vlapic);
   3.196      int i;
   3.197  
   3.198 -    vlapic->domain = v->domain;
   3.199 -
   3.200      vlapic_set_reg(vlapic, APIC_ID, v->vcpu_id << 24);
   3.201  
   3.202      vlapic_set_reg(vlapic, APIC_LVR, VLAPIC_VERSION);
   3.203 @@ -981,30 +967,9 @@ static int vlapic_reset(struct vlapic *v
   3.204  
   3.205      vlapic->flush_tpr_threshold = 0;
   3.206  
   3.207 -    if ( v->vcpu_id == 0 )
   3.208 -        vlapic->apic_base_msr |= MSR_IA32_APICBASE_BSP;
   3.209 -
   3.210      vlapic->base_address = vlapic->apic_base_msr &
   3.211                             MSR_IA32_APICBASE_BASE;
   3.212  
   3.213 -    hvm_vioapic_add_lapic(vlapic, v);
   3.214 -
   3.215 -    init_timer(&vlapic->vlapic_timer,
   3.216 -                  vlapic_timer_fn, vlapic, v->processor);
   3.217 -
   3.218 -#ifdef VLAPIC_NO_BIOS
   3.219 -    /*
   3.220 -     * XXX According to mp sepcific, BIOS will enable LVT0/1,
   3.221 -     * remove it after BIOS enabled
   3.222 -     */
   3.223 -    if ( !v->vcpu_id )
   3.224 -    {
   3.225 -        vlapic_set_reg(vlapic, APIC_LVT0, APIC_MODE_EXTINT << 8);
   3.226 -        vlapic_set_reg(vlapic, APIC_LVT1, APIC_MODE_NMI << 8);
   3.227 -        set_bit(_VLAPIC_BSP_ACCEPT_PIC, &vlapic->status);
   3.228 -    }
   3.229 -#endif
   3.230 -
   3.231      HVM_DBG_LOG(DBG_LEVEL_VLAPIC,
   3.232                  "vcpu=%p, id=%d, vlapic_apic_base_msr=0x%016"PRIx64", "
   3.233                  "base_address=0x%0lx.",
   3.234 @@ -1016,19 +981,10 @@ static int vlapic_reset(struct vlapic *v
   3.235  
   3.236  int vlapic_init(struct vcpu *v)
   3.237  {
   3.238 -    struct vlapic *vlapic;
   3.239 +    struct vlapic *vlapic = vcpu_vlapic(v);
   3.240  
   3.241      HVM_DBG_LOG(DBG_LEVEL_VLAPIC, "vlapic_init %d", v->vcpu_id);
   3.242  
   3.243 -    vlapic = xmalloc_bytes(sizeof(struct vlapic));
   3.244 -    if ( vlapic == NULL )
   3.245 -    {
   3.246 -        printk("malloc vlapic error for vcpu %x\n", v->vcpu_id);
   3.247 -        return -ENOMEM;
   3.248 -    }
   3.249 -
   3.250 -    memset(vlapic, 0, sizeof(struct vlapic));
   3.251 -
   3.252      vlapic->regs_page = alloc_domheap_page(NULL);
   3.253      if ( vlapic->regs_page == NULL )
   3.254      {
   3.255 @@ -1040,22 +996,32 @@ int vlapic_init(struct vcpu *v)
   3.256      vlapic->regs = map_domain_page_global(page_to_mfn(vlapic->regs_page));
   3.257      memset(vlapic->regs, 0, PAGE_SIZE);
   3.258  
   3.259 -    VLAPIC(v) = vlapic;
   3.260 -    vlapic->vcpu = v;
   3.261 +    vlapic_reset(vlapic);
   3.262 +
   3.263 +    if ( v->vcpu_id == 0 )
   3.264 +        vlapic->apic_base_msr |= MSR_IA32_APICBASE_BSP;
   3.265 +
   3.266 +    hvm_vioapic_add_lapic(vlapic, v);
   3.267 +
   3.268 +    init_timer(&vlapic->vlapic_timer,
   3.269 +                  vlapic_timer_fn, vlapic, v->processor);
   3.270  
   3.271 -    vlapic_reset(vlapic);
   3.272 +#ifdef VLAPIC_NO_BIOS
   3.273 +    /* According to mp specification, BIOS will enable LVT0/1. */
   3.274 +    if ( v->vcpu_id == 0 )
   3.275 +    {
   3.276 +        vlapic_set_reg(vlapic, APIC_LVT0, APIC_MODE_EXTINT << 8);
   3.277 +        vlapic_set_reg(vlapic, APIC_LVT1, APIC_MODE_NMI << 8);
   3.278 +        set_bit(_VLAPIC_BSP_ACCEPT_PIC, &vlapic->status);
   3.279 +    }
   3.280 +#endif
   3.281  
   3.282      return 0;
   3.283  }
   3.284  
   3.285  void vlapic_destroy(struct vcpu *v)
   3.286  {
   3.287 -    struct vlapic *vlapic = VLAPIC(v);
   3.288 -    
   3.289 -    if ( vlapic == NULL )
   3.290 -        return;
   3.291 -
   3.292 -    VLAPIC(v) = NULL;
   3.293 +    struct vlapic *vlapic = vcpu_vlapic(v);
   3.294  
   3.295      kill_timer(&vlapic->vlapic_timer);
   3.296      unmap_domain_page_global(vlapic->regs);
     4.1 --- a/xen/arch/x86/hvm/vmx/io.c	Tue Nov 07 13:13:52 2006 +0000
     4.2 +++ b/xen/arch/x86/hvm/vmx/io.c	Tue Nov 07 15:48:10 2006 +0000
     4.3 @@ -96,7 +96,7 @@ asmlinkage void vmx_intr_assist(void)
     4.4      int highest_vector;
     4.5      unsigned long eflags;
     4.6      struct vcpu *v = current;
     4.7 -    struct vlapic *vlapic = VLAPIC(v);
     4.8 +    struct vlapic *vlapic = vcpu_vlapic(v);
     4.9      struct hvm_domain *plat=&v->domain->arch.hvm_domain;
    4.10      struct periodic_time *pt = &plat->pl_time.periodic_tm;
    4.11      struct hvm_virpic *pic= &plat->vpic;
    4.12 @@ -117,7 +117,7 @@ asmlinkage void vmx_intr_assist(void)
    4.13              pic_set_xen_irq(pic, callback_irq, local_events_need_delivery());
    4.14      }
    4.15  
    4.16 -    if ( vlapic && vlapic_enabled(vlapic) && vlapic->flush_tpr_threshold )
    4.17 +    if ( vlapic_enabled(vlapic) && vlapic->flush_tpr_threshold )
    4.18          update_tpr_threshold(vlapic);
    4.19  
    4.20      has_ext_irq = cpu_has_pending_irq(v);
     5.1 --- a/xen/arch/x86/hvm/vmx/vmx.c	Tue Nov 07 13:13:52 2006 +0000
     5.2 +++ b/xen/arch/x86/hvm/vmx/vmx.c	Tue Nov 07 15:48:10 2006 +0000
     5.3 @@ -408,7 +408,7 @@ static void stop_vmx(void)
     5.4  
     5.5  void vmx_migrate_timers(struct vcpu *v)
     5.6  {
     5.7 -    struct periodic_time *pt = &(v->domain->arch.hvm_domain.pl_time.periodic_tm);
     5.8 +    struct periodic_time *pt = &v->domain->arch.hvm_domain.pl_time.periodic_tm;
     5.9      struct RTCState *vrtc = &v->domain->arch.hvm_domain.pl_time.vrtc;
    5.10      struct PMTState *vpmt = &v->domain->arch.hvm_domain.pl_time.vpmt;
    5.11  
    5.12 @@ -417,8 +417,7 @@ void vmx_migrate_timers(struct vcpu *v)
    5.13          migrate_timer(&pt->timer, v->processor);
    5.14          migrate_timer(&v->arch.hvm_vcpu.hlt_timer, v->processor);
    5.15      }
    5.16 -    if ( VLAPIC(v) != NULL )
    5.17 -        migrate_timer(&VLAPIC(v)->vlapic_timer, v->processor);
    5.18 +    migrate_timer(&vcpu_vlapic(v)->vlapic_timer, v->processor);
    5.19      migrate_timer(&vrtc->second_timer, v->processor);
    5.20      migrate_timer(&vrtc->second_timer2, v->processor);
    5.21      migrate_timer(&vpmt->timer, v->processor);
    5.22 @@ -853,7 +852,7 @@ static void vmx_do_cpuid(struct cpu_user
    5.23              /* Mask off reserved bits. */
    5.24              ecx &= ~VMX_VCPU_CPUID_L1_ECX_RESERVED;
    5.25  
    5.26 -            if ( !vlapic_global_enabled((VLAPIC(v))) )
    5.27 +            if ( !vlapic_global_enabled(vcpu_vlapic(v)) )
    5.28                  clear_bit(X86_FEATURE_APIC, &edx);
    5.29      
    5.30  #if CONFIG_PAGING_LEVELS >= 3
    5.31 @@ -1559,7 +1558,7 @@ static int mov_to_cr(int gp, int cr, str
    5.32      unsigned long value;
    5.33      unsigned long old_cr;
    5.34      struct vcpu *v = current;
    5.35 -    struct vlapic *vlapic = VLAPIC(v);
    5.36 +    struct vlapic *vlapic = vcpu_vlapic(v);
    5.37  
    5.38      switch ( gp ) {
    5.39      CASE_GET_REG(EAX, eax);
    5.40 @@ -1705,8 +1704,6 @@ static int mov_to_cr(int gp, int cr, str
    5.41      }
    5.42      case 8:
    5.43      {
    5.44 -        if ( vlapic == NULL )
    5.45 -            break;
    5.46          vlapic_set_reg(vlapic, APIC_TASKPRI, ((value & 0x0F) << 4));
    5.47          break;
    5.48      }
    5.49 @@ -1725,7 +1722,7 @@ static void mov_from_cr(int cr, int gp, 
    5.50  {
    5.51      unsigned long value = 0;
    5.52      struct vcpu *v = current;
    5.53 -    struct vlapic *vlapic = VLAPIC(v);
    5.54 +    struct vlapic *vlapic = vcpu_vlapic(v);
    5.55  
    5.56      switch ( cr )
    5.57      {
    5.58 @@ -1733,8 +1730,6 @@ static void mov_from_cr(int cr, int gp, 
    5.59          value = (unsigned long)v->arch.hvm_vmx.cpu_cr3;
    5.60          break;
    5.61      case 8:
    5.62 -        if ( vlapic == NULL )
    5.63 -            break;
    5.64          value = (unsigned long)vlapic_get_reg(vlapic, APIC_TASKPRI);
    5.65          value = (value & 0xF0) >> 4;
    5.66          break;
    5.67 @@ -1835,7 +1830,7 @@ static inline void vmx_do_msr_read(struc
    5.68          __vmread(GUEST_SYSENTER_EIP, &msr_content);
    5.69          break;
    5.70      case MSR_IA32_APICBASE:
    5.71 -        msr_content = VLAPIC(v) ? VLAPIC(v)->apic_base_msr : 0;
    5.72 +        msr_content = vcpu_vlapic(v)->apic_base_msr;
    5.73          break;
    5.74      default:
    5.75          if (long_mode_do_msr_read(regs))
    5.76 @@ -1892,7 +1887,7 @@ static inline void vmx_do_msr_write(stru
    5.77          __vmwrite(GUEST_SYSENTER_EIP, msr_content);
    5.78          break;
    5.79      case MSR_IA32_APICBASE:
    5.80 -        vlapic_msr_set(VLAPIC(v), msr_content);
    5.81 +        vlapic_msr_set(vcpu_vlapic(v), msr_content);
    5.82          break;
    5.83      default:
    5.84          if ( !long_mode_do_msr_write(regs) )
    5.85 @@ -2307,7 +2302,7 @@ asmlinkage void vmx_vmexit_handler(struc
    5.86          break;
    5.87  
    5.88      case EXIT_REASON_TPR_BELOW_THRESHOLD:
    5.89 -        VLAPIC(v)->flush_tpr_threshold = 1;
    5.90 +        vcpu_vlapic(v)->flush_tpr_threshold = 1;
    5.91          break;
    5.92  
    5.93      default:
     6.1 --- a/xen/include/asm-x86/hvm/vcpu.h	Tue Nov 07 13:13:52 2006 +0000
     6.2 +++ b/xen/include/asm-x86/hvm/vcpu.h	Tue Nov 07 15:48:10 2006 +0000
     6.3 @@ -32,7 +32,7 @@ struct hvm_vcpu {
     6.4      unsigned long       hw_cr3;     /* value we give to HW to use */
     6.5      unsigned long       ioflags;
     6.6      struct hvm_io_op    io_op;
     6.7 -    struct vlapic       *vlapic;
     6.8 +    struct vlapic       vlapic;
     6.9      s64                 cache_tsc_offset;
    6.10      u64                 guest_time;
    6.11  
     7.1 --- a/xen/include/asm-x86/hvm/vlapic.h	Tue Nov 07 13:13:52 2006 +0000
     7.2 +++ b/xen/include/asm-x86/hvm/vlapic.h	Tue Nov 07 15:48:10 2006 +0000
     7.3 @@ -25,7 +25,10 @@
     7.4  
     7.5  #define MAX_VECTOR      256
     7.6  
     7.7 -#define VLAPIC(v)                       (v->arch.hvm_vcpu.vlapic)
     7.8 +#define vcpu_vlapic(vcpu)   (&(vcpu)->arch.hvm_vcpu.vlapic)
     7.9 +#define vlapic_vcpu(vpic)   (container_of((vpic), struct vcpu, \
    7.10 +                                          arch.hvm_vcpu.vlapic))
    7.11 +#define vlapic_domain(vpic) (vlapic_vcpu(vlapic)->domain)
    7.12  
    7.13  #define VLAPIC_ID(vlapic)   \
    7.14      (GET_APIC_ID(vlapic_get_reg(vlapic, APIC_ID)))
    7.15 @@ -51,8 +54,6 @@ struct vlapic {
    7.16      int                timer_pending_count;
    7.17      int                flush_tpr_threshold;
    7.18      s_time_t           timer_last_update;
    7.19 -    struct vcpu        *vcpu;
    7.20 -    struct domain      *domain;
    7.21      struct page_info   *regs_page;
    7.22      void               *regs;
    7.23  };