direct-io.hg
changeset 5775:9b77ba29108d
The VMCS control bits in the current tree are not optimal. Attached is
a patch to improve the VMCS control bits setting. It also adds checks to
detect any non-optimal or incompatible settings for the VMCS control
bits based on MSRs, and fixes a bug associated with vmcs region freeing.
Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com>
Signed-off-by: Jun Nakajima <jun.nakajima@intel.com>
Signed-off-by: Xin Li <xin.b.li@intel.com>
a patch to improve the VMCS control bits setting. It also adds checks to
detect any non-optimal or incompatible settings for the VMCS control
bits based on MSRs, and fixes a bug associated with vmcs region freeing.
Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com>
Signed-off-by: Jun Nakajima <jun.nakajima@intel.com>
Signed-off-by: Xin Li <xin.b.li@intel.com>
| author | kaf24@firebug.cl.cam.ac.uk |
|---|---|
| date | Thu Jul 14 08:00:55 2005 +0000 (2005-07-14) |
| parents | 71d000e59b13 |
| children | 64f26eed8d47 |
| files | xen/arch/x86/vmx.c xen/arch/x86/vmx_vmcs.c xen/include/asm-x86/msr.h xen/include/asm-x86/vmx.h |
line diff
1.1 --- a/xen/arch/x86/vmx.c Thu Jul 14 08:00:35 2005 +0000 1.2 +++ b/xen/arch/x86/vmx.c Thu Jul 14 08:00:55 2005 +0000 1.3 @@ -262,6 +262,20 @@ extern long evtchn_send(int lport); 1.4 extern long do_block(void); 1.5 void do_nmi(struct cpu_user_regs *, unsigned long); 1.6 1.7 +static int check_vmx_controls(ctrls, msr) 1.8 +{ 1.9 + u32 vmx_msr_low, vmx_msr_high; 1.10 + 1.11 + rdmsr(msr, vmx_msr_low, vmx_msr_high); 1.12 + if (ctrls < vmx_msr_low || ctrls > vmx_msr_high) { 1.13 + printk("Insufficient VMX capability 0x%x, " 1.14 + "msr=0x%x,low=0x%8x,high=0x%x\n", 1.15 + ctrls, msr, vmx_msr_low, vmx_msr_high); 1.16 + return 0; 1.17 + } 1.18 + return 1; 1.19 +} 1.20 + 1.21 int start_vmx(void) 1.22 { 1.23 struct vmcs_struct *vmcs; 1.24 @@ -292,6 +306,19 @@ int start_vmx(void) 1.25 IA32_FEATURE_CONTROL_MSR_ENABLE_VMXON, 0); 1.26 } 1.27 1.28 + if (!check_vmx_controls(MONITOR_PIN_BASED_EXEC_CONTROLS, 1.29 + MSR_IA32_VMX_PINBASED_CTLS_MSR)) 1.30 + return 0; 1.31 + if (!check_vmx_controls(MONITOR_CPU_BASED_EXEC_CONTROLS, 1.32 + MSR_IA32_VMX_PROCBASED_CTLS_MSR)) 1.33 + return 0; 1.34 + if (!check_vmx_controls(MONITOR_VM_EXIT_CONTROLS, 1.35 + MSR_IA32_VMX_EXIT_CTLS_MSR)) 1.36 + return 0; 1.37 + if (!check_vmx_controls(MONITOR_VM_ENTRY_CONTROLS, 1.38 + MSR_IA32_VMX_ENTRY_CTLS_MSR)) 1.39 + return 0; 1.40 + 1.41 set_in_cr4(X86_CR4_VMXE); /* Enable VMXE */ 1.42 1.43 if (!(vmcs = alloc_vmcs())) { 1.44 @@ -965,7 +992,7 @@ static int vmx_set_cr0(unsigned long val 1.45 set_bit(VMX_CPU_STATE_LMA_ENABLED, 1.46 &d->arch.arch_vmx.cpu_state); 1.47 __vmread(VM_ENTRY_CONTROLS, &vm_entry_value); 1.48 - vm_entry_value |= VM_ENTRY_CONTROLS_IA_32E_MODE; 1.49 + vm_entry_value |= VM_ENTRY_CONTROLS_IA32E_MODE; 1.50 __vmwrite(VM_ENTRY_CONTROLS, vm_entry_value); 1.51 1.52 #if CONFIG_PAGING_LEVELS >= 4 1.53 @@ -1028,7 +1055,7 @@ static int vmx_set_cr0(unsigned long val 1.54 clear_bit(VMX_CPU_STATE_LMA_ENABLED, 1.55 &d->arch.arch_vmx.cpu_state); 1.56 __vmread(VM_ENTRY_CONTROLS, &vm_entry_value); 1.57 - vm_entry_value &= ~VM_ENTRY_CONTROLS_IA_32E_MODE; 1.58 + vm_entry_value &= ~VM_ENTRY_CONTROLS_IA32E_MODE; 1.59 __vmwrite(VM_ENTRY_CONTROLS, vm_entry_value); 1.60 } 1.61 }
2.1 --- a/xen/arch/x86/vmx_vmcs.c Thu Jul 14 08:00:35 2005 +0000 2.2 +++ b/xen/arch/x86/vmx_vmcs.c Thu Jul 14 08:00:55 2005 +0000 2.3 @@ -55,25 +55,22 @@ void free_vmcs(struct vmcs_struct *vmcs) 2.4 { 2.5 int order; 2.6 2.7 - order = (vmcs_size >> PAGE_SHIFT) - 1; 2.8 + order = get_order(vmcs_size); 2.9 free_xenheap_pages(vmcs, order); 2.10 } 2.11 2.12 static inline int construct_vmcs_controls(void) 2.13 { 2.14 int error = 0; 2.15 - 2.16 + 2.17 error |= __vmwrite(PIN_BASED_VM_EXEC_CONTROL, 2.18 MONITOR_PIN_BASED_EXEC_CONTROLS); 2.19 2.20 error |= __vmwrite(CPU_BASED_VM_EXEC_CONTROL, 2.21 MONITOR_CPU_BASED_EXEC_CONTROLS); 2.22 -#if defined (__x86_64__) 2.23 - error |= __vmwrite(VM_EXIT_CONTROLS, 2.24 - MONITOR_VM_EXIT_CONTROLS | VM_EXIT_CONTROLS_IA_32E_MODE); 2.25 -#else 2.26 + 2.27 error |= __vmwrite(VM_EXIT_CONTROLS, MONITOR_VM_EXIT_CONTROLS); 2.28 -#endif 2.29 + 2.30 error |= __vmwrite(VM_ENTRY_CONTROLS, MONITOR_VM_ENTRY_CONTROLS); 2.31 2.32 return error;
3.1 --- a/xen/include/asm-x86/msr.h Thu Jul 14 08:00:35 2005 +0000 3.2 +++ b/xen/include/asm-x86/msr.h Thu Jul 14 08:00:55 2005 +0000 3.3 @@ -94,6 +94,11 @@ 3.4 3.5 /* MSRs & bits used for VMX enabling */ 3.6 #define MSR_IA32_VMX_BASIC_MSR 0x480 3.7 +#define MSR_IA32_VMX_PINBASED_CTLS_MSR 0x481 3.8 +#define MSR_IA32_VMX_PROCBASED_CTLS_MSR 0x482 3.9 +#define MSR_IA32_VMX_EXIT_CTLS_MSR 0x483 3.10 +#define MSR_IA32_VMX_ENTRY_CTLS_MSR 0x484 3.11 +#define MSR_IA32_VMX_MISC_MSR 0x485 3.12 #define IA32_FEATURE_CONTROL_MSR 0x3a 3.13 #define IA32_FEATURE_CONTROL_MSR_LOCK 0x1 3.14 #define IA32_FEATURE_CONTROL_MSR_ENABLE_VMXON 0x4
4.1 --- a/xen/include/asm-x86/vmx.h Thu Jul 14 08:00:35 2005 +0000 4.2 +++ b/xen/include/asm-x86/vmx.h Thu Jul 14 08:00:55 2005 +0000 4.3 @@ -46,32 +46,61 @@ extern unsigned int cpu_rev; 4.4 #define MONITOR_PIN_BASED_EXEC_CONTROLS_RESERVED_VALUE 0x00000016 4.5 4.6 #define MONITOR_PIN_BASED_EXEC_CONTROLS \ 4.7 + ( \ 4.8 MONITOR_PIN_BASED_EXEC_CONTROLS_RESERVED_VALUE | \ 4.9 PIN_BASED_EXT_INTR_MASK | \ 4.10 - PIN_BASED_NMI_EXITING 4.11 + PIN_BASED_NMI_EXITING \ 4.12 + ) 4.13 4.14 #define MONITOR_CPU_BASED_EXEC_CONTROLS_RESERVED_VALUE 0x0401e172 4.15 4.16 -#define MONITOR_CPU_BASED_EXEC_CONTROLS \ 4.17 +#define _MONITOR_CPU_BASED_EXEC_CONTROLS \ 4.18 + ( \ 4.19 MONITOR_CPU_BASED_EXEC_CONTROLS_RESERVED_VALUE | \ 4.20 CPU_BASED_HLT_EXITING | \ 4.21 CPU_BASED_INVDPG_EXITING | \ 4.22 CPU_BASED_MWAIT_EXITING | \ 4.23 CPU_BASED_MOV_DR_EXITING | \ 4.24 - CPU_BASED_UNCOND_IO_EXITING | \ 4.25 + CPU_BASED_UNCOND_IO_EXITING \ 4.26 + ) 4.27 + 4.28 +#define MONITOR_CPU_BASED_EXEC_CONTROLS_IA32E_MODE \ 4.29 + ( \ 4.30 CPU_BASED_CR8_LOAD_EXITING | \ 4.31 - CPU_BASED_CR8_STORE_EXITING 4.32 + CPU_BASED_CR8_STORE_EXITING \ 4.33 + ) 4.34 + 4.35 +#define MONITOR_VM_EXIT_CONTROLS_RESERVED_VALUE 0x0003edff 4.36 4.37 -#define MONITOR_VM_EXIT_CONTROLS_RESERVED_VALUE 0x0003edff 4.38 +#define MONITOR_VM_EXIT_CONTROLS_IA32E_MODE 0x00000200 4.39 + 4.40 +#define _MONITOR_VM_EXIT_CONTROLS \ 4.41 + ( \ 4.42 + MONITOR_VM_EXIT_CONTROLS_RESERVED_VALUE |\ 4.43 + VM_EXIT_ACK_INTR_ON_EXIT \ 4.44 + ) 4.45 4.46 -#define VM_EXIT_CONTROLS_IA_32E_MODE 0x00000200 4.47 +#if defined (__x86_64__) 4.48 +#define MONITOR_CPU_BASED_EXEC_CONTROLS \ 4.49 + ( \ 4.50 + _MONITOR_CPU_BASED_EXEC_CONTROLS | \ 4.51 + MONITOR_CPU_BASED_EXEC_CONTROLS_IA32E_MODE \ 4.52 + ) 4.53 +#define MONITOR_VM_EXIT_CONTROLS \ 4.54 + ( \ 4.55 + _MONITOR_VM_EXIT_CONTROLS | \ 4.56 + MONITOR_VM_EXIT_CONTROLS_IA32E_MODE \ 4.57 + ) 4.58 +#else 4.59 +#define MONITOR_CPU_BASED_EXEC_CONTROLS \ 4.60 + _MONITOR_CPU_BASED_EXEC_CONTROLS 4.61 4.62 -#define MONITOR_VM_EXIT_CONTROLS \ 4.63 - MONITOR_VM_EXIT_CONTROLS_RESERVED_VALUE |\ 4.64 - VM_EXIT_ACK_INTR_ON_EXIT 4.65 +#define MONITOR_VM_EXIT_CONTROLS \ 4.66 + _MONITOR_VM_EXIT_CONTROLS 4.67 +#endif 4.68 4.69 #define VM_ENTRY_CONTROLS_RESERVED_VALUE 0x000011ff 4.70 -#define VM_ENTRY_CONTROLS_IA_32E_MODE 0x00000200 4.71 +#define VM_ENTRY_CONTROLS_IA32E_MODE 0x00000200 4.72 #define MONITOR_VM_ENTRY_CONTROLS VM_ENTRY_CONTROLS_RESERVED_VALUE 4.73 /* 4.74 * Exit Reasons