direct-io.hg

changeset 13083:893b786cc66a

[IA64] Mask out reserved bits to avoid Reserved Register/Field faults.

Signed-off-by: Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
author awilliam@xenbuild2.aw
date Mon Dec 18 10:04:49 2006 -0700 (2006-12-18)
parents cf23494af72c
children ea2dc4a3c8eb
files xen/arch/ia64/xen/vcpu.c xen/include/asm-ia64/linux-xen/asm/pgtable.h
line diff
     1.1 --- a/xen/arch/ia64/xen/vcpu.c	Mon Dec 18 09:48:23 2006 -0700
     1.2 +++ b/xen/arch/ia64/xen/vcpu.c	Mon Dec 18 10:04:49 2006 -0700
     1.3 @@ -2162,6 +2162,7 @@ vcpu_itc_no_srlz(VCPU * vcpu, u64 IorD, 
     1.4  	BUG_ON(logps > PAGE_SHIFT);
     1.5  	vcpu_tlb_track_insert_or_dirty(vcpu, vaddr, entry);
     1.6  	psr = ia64_clear_ic();
     1.7 +	pte &= ~(_PAGE_RV2 | _PAGE_RV1);	// Mask out the reserved bits.
     1.8  	ia64_itc(IorD, vaddr, pte, ps);	// FIXME: look for bigger mappings
     1.9  	ia64_set_psr(psr);
    1.10  	// ia64_srlz_i(); // no srls req'd, will rfi later
     2.1 --- a/xen/include/asm-ia64/linux-xen/asm/pgtable.h	Mon Dec 18 09:48:23 2006 -0700
     2.2 +++ b/xen/include/asm-ia64/linux-xen/asm/pgtable.h	Mon Dec 18 10:04:49 2006 -0700
     2.3 @@ -39,6 +39,11 @@
     2.4  #define _PAGE_P			(1 << _PAGE_P_BIT)	/* page present bit */
     2.5  #define _PAGE_MA_WB		(0x0 <<  2)	/* write back memory attribute */
     2.6  #ifdef XEN
     2.7 +#define _PAGE_RV1_BIT		1
     2.8 +#define _PAGE_RV2_BIT		50
     2.9 +#define _PAGE_RV1		(__IA64_UL(1) << _PAGE_RV1_BIT)	/* reserved bit */
    2.10 +#define _PAGE_RV2		(__IA64_UL(3) << _PAGE_RV2_BIT)	/* reserved bits */
    2.11 +
    2.12  #define _PAGE_MA_ST		(0x1 <<  2)	/* is reserved for software use */
    2.13  #endif
    2.14  #define _PAGE_MA_UC		(0x4 <<  2)	/* uncacheable memory attribute */