direct-io.hg

changeset 7314:8463ce38eda3

Minor code restructure in vcpu_translate (prep for more later)
author djm@kirby.fc.hp.com
date Thu Sep 29 13:16:40 2005 -0600 (2005-09-29)
parents eaedc6b4ec0f
children c0ac925e8f1d
files xen/arch/ia64/asm-offsets.c xen/arch/ia64/xen/process.c xen/arch/ia64/xen/vcpu.c xen/include/asm-ia64/vcpu.h
line diff
     1.1 --- a/xen/arch/ia64/asm-offsets.c	Fri Sep 23 15:41:28 2005 -0600
     1.2 +++ b/xen/arch/ia64/asm-offsets.c	Thu Sep 29 13:16:40 2005 -0600
     1.3 @@ -65,6 +65,7 @@ void foo(void)
     1.4  	DEFINE(XSI_INCOMPL_REG_OFS, offsetof(mapped_regs_t, incomplete_regframe));
     1.5  	DEFINE(XSI_PEND_OFS, offsetof(mapped_regs_t, pending_interruption));
     1.6  	DEFINE(XSI_RR0_OFS, offsetof(mapped_regs_t, rrs[0]));
     1.7 +	DEFINE(XSI_IHA_OFS, offsetof(mapped_regs_t, iha));
     1.8  	DEFINE(XSI_TPR_OFS, offsetof(mapped_regs_t, tpr));
     1.9  	DEFINE(XSI_PTA_OFS, offsetof(mapped_regs_t, pta));
    1.10  	DEFINE(XSI_ITV_OFS, offsetof(mapped_regs_t, itv));
     2.1 --- a/xen/arch/ia64/xen/process.c	Fri Sep 23 15:41:28 2005 -0600
     2.2 +++ b/xen/arch/ia64/xen/process.c	Thu Sep 29 13:16:40 2005 -0600
     2.3 @@ -275,7 +275,7 @@ int handle_lazy_cover(struct vcpu *v, un
     2.4  
     2.5  void ia64_do_page_fault (unsigned long address, unsigned long isr, struct pt_regs *regs, unsigned long itir)
     2.6  {
     2.7 -	unsigned long iip = regs->cr_iip;
     2.8 +	unsigned long iip = regs->cr_iip, iha;
     2.9  	// FIXME should validate address here
    2.10  	unsigned long pteval;
    2.11  	unsigned long is_data = !((isr >> IA64_ISR_X_BIT) & 1UL);
    2.12 @@ -294,7 +294,7 @@ void ia64_do_page_fault (unsigned long a
    2.13  		return;
    2.14  	}
    2.15  
    2.16 -	fault = vcpu_translate(current,address,is_data,&pteval,&itir);
    2.17 +	fault = vcpu_translate(current,address,is_data,&pteval,&itir,&iha);
    2.18  	if (fault == IA64_NO_FAULT)
    2.19  	{
    2.20  		pteval = translate_domain_pte(pteval,address,itir);
     3.1 --- a/xen/arch/ia64/xen/vcpu.c	Fri Sep 23 15:41:28 2005 -0600
     3.2 +++ b/xen/arch/ia64/xen/vcpu.c	Thu Sep 29 13:16:40 2005 -0600
     3.3 @@ -1354,9 +1354,9 @@ IA64FAULT vcpu_ttag(VCPU *vcpu, UINT64 v
     3.4  
     3.5  unsigned long vhpt_translate_count = 0;
     3.6  
     3.7 -IA64FAULT vcpu_translate(VCPU *vcpu, UINT64 address, BOOLEAN is_data, UINT64 *pteval, UINT64 *itir)
     3.8 +IA64FAULT vcpu_translate(VCPU *vcpu, UINT64 address, BOOLEAN is_data, UINT64 *pteval, UINT64 *itir, UINT64 *iha)
     3.9  {
    3.10 -	unsigned long pta, pta_mask, iha, pte, ps;
    3.11 +	unsigned long pta, pta_mask, pte, ps;
    3.12  	TR_ENTRY *trp;
    3.13  	ia64_rr rr;
    3.14  
    3.15 @@ -1398,51 +1398,45 @@ IA64FAULT vcpu_translate(VCPU *vcpu, UIN
    3.16  	/* check guest VHPT */
    3.17  	pta = PSCB(vcpu,pta);
    3.18  	rr.rrval = PSCB(vcpu,rrs)[address>>61];
    3.19 -	if (rr.ve && (pta & IA64_PTA_VE))
    3.20 -	{
    3.21 -		if (pta & IA64_PTA_VF)
    3.22 -		{
    3.23 -			/* long format VHPT - not implemented */
    3.24 -			return (is_data ? IA64_DATA_TLB_VECTOR : IA64_INST_TLB_VECTOR);
    3.25 -		}
    3.26 -		else
    3.27 -		{
    3.28 -			/* short format VHPT */
    3.29 +	if (!rr.ve || !(pta & IA64_PTA_VE))
    3.30 +		return (is_data ? IA64_ALT_DATA_TLB_VECTOR :
    3.31 +				IA64_ALT_INST_TLB_VECTOR);
    3.32 +	if (pta & IA64_PTA_VF) { /* long format VHPT - not implemented */
    3.33 +		// thash won't work right?
    3.34 +		panic_domain(vcpu_regs(vcpu),"can't do long format VHPT\n");
    3.35 +		//return (is_data ? IA64_DATA_TLB_VECTOR:IA64_INST_TLB_VECTOR);
    3.36 +	}
    3.37  
    3.38 -			/* avoid recursively walking VHPT */
    3.39 -			pta_mask = (itir_mask(pta) << 3) >> 3;
    3.40 -			if (((address ^ pta) & pta_mask) == 0)
    3.41 -				return (is_data ? IA64_DATA_TLB_VECTOR : IA64_INST_TLB_VECTOR);
    3.42 +	/* avoid recursively walking (short format) VHPT */
    3.43 +	pta_mask = (itir_mask(pta) << 3) >> 3;
    3.44 +	if (((address ^ pta) & pta_mask) == 0)
    3.45 +		return (is_data ? IA64_DATA_TLB_VECTOR : IA64_INST_TLB_VECTOR);
    3.46  
    3.47 -			vcpu_thash(vcpu, address, &iha);
    3.48 -			if (__copy_from_user(&pte, (void *)iha, sizeof(pte)) != 0)
    3.49 -				return IA64_VHPT_FAULT;
    3.50 +	vcpu_thash(vcpu, address, iha);
    3.51 +	if (__copy_from_user(&pte, (void *)(*iha), sizeof(pte)) != 0)
    3.52 +		return IA64_VHPT_FAULT;
    3.53  
    3.54 -			/* 
    3.55 -			 * Optimisation: this VHPT walker aborts on not-present pages
    3.56 -			 * instead of inserting a not-present translation, this allows
    3.57 -			 * vectoring directly to the miss handler.
    3.58 -	\		 */
    3.59 -			if (pte & _PAGE_P)
    3.60 -			{
    3.61 -				*pteval = pte;
    3.62 -				*itir = vcpu_get_itir_on_fault(vcpu,address);
    3.63 -				vhpt_translate_count++;
    3.64 -				return IA64_NO_FAULT;
    3.65 -			}
    3.66 -			return (is_data ? IA64_DATA_TLB_VECTOR : IA64_INST_TLB_VECTOR);
    3.67 -		}
    3.68 +	/*
    3.69 +	 * Optimisation: this VHPT walker aborts on not-present pages
    3.70 +	 * instead of inserting a not-present translation, this allows
    3.71 +	 * vectoring directly to the miss handler.
    3.72 +	 */
    3.73 +	if (pte & _PAGE_P) {
    3.74 +		*pteval = pte;
    3.75 +		*itir = vcpu_get_itir_on_fault(vcpu,address);
    3.76 +		vhpt_translate_count++;
    3.77 +		return IA64_NO_FAULT;
    3.78  	}
    3.79 -	return (is_data ? IA64_ALT_DATA_TLB_VECTOR : IA64_ALT_INST_TLB_VECTOR);
    3.80 +	return (is_data ? IA64_DATA_TLB_VECTOR : IA64_INST_TLB_VECTOR);
    3.81  }
    3.82  
    3.83  IA64FAULT vcpu_tpa(VCPU *vcpu, UINT64 vadr, UINT64 *padr)
    3.84  {
    3.85 -	UINT64 pteval, itir, mask;
    3.86 +	UINT64 pteval, itir, mask, iha;
    3.87  	IA64FAULT fault;
    3.88  
    3.89  	in_tpa = 1;
    3.90 -	fault = vcpu_translate(vcpu, vadr, 1, &pteval, &itir);
    3.91 +	fault = vcpu_translate(vcpu, vadr, 1, &pteval, &itir, &iha);
    3.92  	in_tpa = 0;
    3.93  	if (fault == IA64_NO_FAULT)
    3.94  	{
     4.1 --- a/xen/include/asm-ia64/vcpu.h	Fri Sep 23 15:41:28 2005 -0600
     4.2 +++ b/xen/include/asm-ia64/vcpu.h	Thu Sep 29 13:16:40 2005 -0600
     4.3 @@ -133,7 +133,7 @@ extern IA64FAULT vcpu_ptc_g(VCPU *vcpu, 
     4.4  extern IA64FAULT vcpu_ptc_ga(VCPU *vcpu, UINT64 vadr, UINT64 addr_range);
     4.5  extern IA64FAULT vcpu_ptr_d(VCPU *vcpu,UINT64 vadr, UINT64 addr_range);
     4.6  extern IA64FAULT vcpu_ptr_i(VCPU *vcpu,UINT64 vadr, UINT64 addr_range);
     4.7 -extern IA64FAULT vcpu_translate(VCPU *vcpu, UINT64 address, BOOLEAN is_data, UINT64 *pteval, UINT64 *itir);
     4.8 +extern IA64FAULT vcpu_translate(VCPU *vcpu, UINT64 address, BOOLEAN is_data, UINT64 *pteval, UINT64 *itir, UINT64 *iha);
     4.9  extern IA64FAULT vcpu_tpa(VCPU *vcpu, UINT64 vadr, UINT64 *padr);
    4.10  /* misc */
    4.11  extern IA64FAULT vcpu_rfi(VCPU *vcpu);