direct-io.hg

changeset 12823:5dd8306e9032

[IA64] MCA support - add include/asm-ia64/sal.h to sparse tree

Signed-off-by: Yutaka Ezaki <yutaka.ezaki@jp.fujitsu.com>
Signed-off-by: Masaki Kanno <kanno.masaki@jp.fujitsu.com>
Signed-off-by: Kazuhiro Suzuki <kaz@jp.fujitsu.com>
author awilliam@xenbuild.aw
date Sun Oct 29 09:27:17 2006 -0700 (2006-10-29)
parents 7452d58e4a3b
children 44119a4b46bd
files linux-2.6-xen-sparse/include/asm-ia64/sal.h
line diff
     1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/linux-2.6-xen-sparse/include/asm-ia64/sal.h	Sun Oct 29 09:27:17 2006 -0700
     1.3 @@ -0,0 +1,883 @@
     1.4 +#ifndef _ASM_IA64_SAL_H
     1.5 +#define _ASM_IA64_SAL_H
     1.6 +
     1.7 +/*
     1.8 + * System Abstraction Layer definitions.
     1.9 + *
    1.10 + * This is based on version 2.5 of the manual "IA-64 System
    1.11 + * Abstraction Layer".
    1.12 + *
    1.13 + * Copyright (C) 2001 Intel
    1.14 + * Copyright (C) 2002 Jenna Hall <jenna.s.hall@intel.com>
    1.15 + * Copyright (C) 2001 Fred Lewis <frederick.v.lewis@intel.com>
    1.16 + * Copyright (C) 1998, 1999, 2001, 2003 Hewlett-Packard Co
    1.17 + *	David Mosberger-Tang <davidm@hpl.hp.com>
    1.18 + * Copyright (C) 1999 Srinivasa Prasad Thirumalachar <sprasad@sprasad.engr.sgi.com>
    1.19 + *
    1.20 + * 02/01/04 J. Hall Updated Error Record Structures to conform to July 2001
    1.21 + *		    revision of the SAL spec.
    1.22 + * 01/01/03 fvlewis Updated Error Record Structures to conform with Nov. 2000
    1.23 + *                  revision of the SAL spec.
    1.24 + * 99/09/29 davidm	Updated for SAL 2.6.
    1.25 + * 00/03/29 cfleck      Updated SAL Error Logging info for processor (SAL 2.6)
    1.26 + *                      (plus examples of platform error info structures from smariset @ Intel)
    1.27 + */
    1.28 +
    1.29 +#define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT		0
    1.30 +#define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT	1
    1.31 +#define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT	2
    1.32 +#define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT	 	3
    1.33 +
    1.34 +#define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK	  (1<<IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT)
    1.35 +#define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT (1<<IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT)
    1.36 +#define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT (1<<IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT)
    1.37 +#define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT	  (1<<IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT)
    1.38 +
    1.39 +#ifndef __ASSEMBLY__
    1.40 +
    1.41 +#include <linux/bcd.h>
    1.42 +#include <linux/spinlock.h>
    1.43 +#include <linux/efi.h>
    1.44 +
    1.45 +#include <asm/pal.h>
    1.46 +#include <asm/system.h>
    1.47 +#include <asm/fpu.h>
    1.48 +
    1.49 +extern spinlock_t sal_lock;
    1.50 +
    1.51 +/* SAL spec _requires_ eight args for each call. */
    1.52 +#define __SAL_CALL(result,a0,a1,a2,a3,a4,a5,a6,a7)	\
    1.53 +	result = (*ia64_sal)(a0,a1,a2,a3,a4,a5,a6,a7)
    1.54 +
    1.55 +# define SAL_CALL(result,args...) do {				\
    1.56 +	unsigned long __ia64_sc_flags;				\
    1.57 +	struct ia64_fpreg __ia64_sc_fr[6];			\
    1.58 +	ia64_save_scratch_fpregs(__ia64_sc_fr);			\
    1.59 +	spin_lock_irqsave(&sal_lock, __ia64_sc_flags);		\
    1.60 +	__SAL_CALL(result, args);				\
    1.61 +	spin_unlock_irqrestore(&sal_lock, __ia64_sc_flags);	\
    1.62 +	ia64_load_scratch_fpregs(__ia64_sc_fr);			\
    1.63 +} while (0)
    1.64 +
    1.65 +# define SAL_CALL_NOLOCK(result,args...) do {		\
    1.66 +	unsigned long __ia64_scn_flags;			\
    1.67 +	struct ia64_fpreg __ia64_scn_fr[6];		\
    1.68 +	ia64_save_scratch_fpregs(__ia64_scn_fr);	\
    1.69 +	local_irq_save(__ia64_scn_flags);		\
    1.70 +	__SAL_CALL(result, args);			\
    1.71 +	local_irq_restore(__ia64_scn_flags);		\
    1.72 +	ia64_load_scratch_fpregs(__ia64_scn_fr);	\
    1.73 +} while (0)
    1.74 +
    1.75 +# define SAL_CALL_REENTRANT(result,args...) do {	\
    1.76 +	struct ia64_fpreg __ia64_scs_fr[6];		\
    1.77 +	ia64_save_scratch_fpregs(__ia64_scs_fr);	\
    1.78 +	preempt_disable();				\
    1.79 +	__SAL_CALL(result, args);			\
    1.80 +	preempt_enable();				\
    1.81 +	ia64_load_scratch_fpregs(__ia64_scs_fr);	\
    1.82 +} while (0)
    1.83 +
    1.84 +#define SAL_SET_VECTORS			0x01000000
    1.85 +#define SAL_GET_STATE_INFO		0x01000001
    1.86 +#define SAL_GET_STATE_INFO_SIZE		0x01000002
    1.87 +#define SAL_CLEAR_STATE_INFO		0x01000003
    1.88 +#define SAL_MC_RENDEZ			0x01000004
    1.89 +#define SAL_MC_SET_PARAMS		0x01000005
    1.90 +#define SAL_REGISTER_PHYSICAL_ADDR	0x01000006
    1.91 +
    1.92 +#define SAL_CACHE_FLUSH			0x01000008
    1.93 +#define SAL_CACHE_INIT			0x01000009
    1.94 +#define SAL_PCI_CONFIG_READ		0x01000010
    1.95 +#define SAL_PCI_CONFIG_WRITE		0x01000011
    1.96 +#define SAL_FREQ_BASE			0x01000012
    1.97 +#define SAL_PHYSICAL_ID_INFO		0x01000013
    1.98 +
    1.99 +#define SAL_UPDATE_PAL			0x01000020
   1.100 +
   1.101 +struct ia64_sal_retval {
   1.102 +	/*
   1.103 +	 * A zero status value indicates call completed without error.
   1.104 +	 * A negative status value indicates reason of call failure.
   1.105 +	 * A positive status value indicates success but an
   1.106 +	 * informational value should be printed (e.g., "reboot for
   1.107 +	 * change to take effect").
   1.108 +	 */
   1.109 +	s64 status;
   1.110 +	u64 v0;
   1.111 +	u64 v1;
   1.112 +	u64 v2;
   1.113 +};
   1.114 +
   1.115 +typedef struct ia64_sal_retval (*ia64_sal_handler) (u64, ...);
   1.116 +
   1.117 +enum {
   1.118 +	SAL_FREQ_BASE_PLATFORM = 0,
   1.119 +	SAL_FREQ_BASE_INTERVAL_TIMER = 1,
   1.120 +	SAL_FREQ_BASE_REALTIME_CLOCK = 2
   1.121 +};
   1.122 +
   1.123 +/*
   1.124 + * The SAL system table is followed by a variable number of variable
   1.125 + * length descriptors.  The structure of these descriptors follows
   1.126 + * below.
   1.127 + * The defininition follows SAL specs from July 2000
   1.128 + */
   1.129 +struct ia64_sal_systab {
   1.130 +	u8 signature[4];	/* should be "SST_" */
   1.131 +	u32 size;		/* size of this table in bytes */
   1.132 +	u8 sal_rev_minor;
   1.133 +	u8 sal_rev_major;
   1.134 +	u16 entry_count;	/* # of entries in variable portion */
   1.135 +	u8 checksum;
   1.136 +	u8 reserved1[7];
   1.137 +	u8 sal_a_rev_minor;
   1.138 +	u8 sal_a_rev_major;
   1.139 +	u8 sal_b_rev_minor;
   1.140 +	u8 sal_b_rev_major;
   1.141 +	/* oem_id & product_id: terminating NUL is missing if string is exactly 32 bytes long. */
   1.142 +	u8 oem_id[32];
   1.143 +	u8 product_id[32];	/* ASCII product id  */
   1.144 +	u8 reserved2[8];
   1.145 +};
   1.146 +
   1.147 +enum sal_systab_entry_type {
   1.148 +	SAL_DESC_ENTRY_POINT = 0,
   1.149 +	SAL_DESC_MEMORY = 1,
   1.150 +	SAL_DESC_PLATFORM_FEATURE = 2,
   1.151 +	SAL_DESC_TR = 3,
   1.152 +	SAL_DESC_PTC = 4,
   1.153 +	SAL_DESC_AP_WAKEUP = 5
   1.154 +};
   1.155 +
   1.156 +/*
   1.157 + * Entry type:	Size:
   1.158 + *	0	48
   1.159 + *	1	32
   1.160 + *	2	16
   1.161 + *	3	32
   1.162 + *	4	16
   1.163 + *	5	16
   1.164 + */
   1.165 +#define SAL_DESC_SIZE(type)	"\060\040\020\040\020\020"[(unsigned) type]
   1.166 +
   1.167 +typedef struct ia64_sal_desc_entry_point {
   1.168 +	u8 type;
   1.169 +	u8 reserved1[7];
   1.170 +	u64 pal_proc;
   1.171 +	u64 sal_proc;
   1.172 +	u64 gp;
   1.173 +	u8 reserved2[16];
   1.174 +}ia64_sal_desc_entry_point_t;
   1.175 +
   1.176 +typedef struct ia64_sal_desc_memory {
   1.177 +	u8 type;
   1.178 +	u8 used_by_sal;	/* needs to be mapped for SAL? */
   1.179 +	u8 mem_attr;		/* current memory attribute setting */
   1.180 +	u8 access_rights;	/* access rights set up by SAL */
   1.181 +	u8 mem_attr_mask;	/* mask of supported memory attributes */
   1.182 +	u8 reserved1;
   1.183 +	u8 mem_type;		/* memory type */
   1.184 +	u8 mem_usage;		/* memory usage */
   1.185 +	u64 addr;		/* physical address of memory */
   1.186 +	u32 length;	/* length (multiple of 4KB pages) */
   1.187 +	u32 reserved2;
   1.188 +	u8 oem_reserved[8];
   1.189 +} ia64_sal_desc_memory_t;
   1.190 +
   1.191 +typedef struct ia64_sal_desc_platform_feature {
   1.192 +	u8 type;
   1.193 +	u8 feature_mask;
   1.194 +	u8 reserved1[14];
   1.195 +} ia64_sal_desc_platform_feature_t;
   1.196 +
   1.197 +typedef struct ia64_sal_desc_tr {
   1.198 +	u8 type;
   1.199 +	u8 tr_type;		/* 0 == instruction, 1 == data */
   1.200 +	u8 regnum;		/* translation register number */
   1.201 +	u8 reserved1[5];
   1.202 +	u64 addr;		/* virtual address of area covered */
   1.203 +	u64 page_size;		/* encoded page size */
   1.204 +	u8 reserved2[8];
   1.205 +} ia64_sal_desc_tr_t;
   1.206 +
   1.207 +typedef struct ia64_sal_desc_ptc {
   1.208 +	u8 type;
   1.209 +	u8 reserved1[3];
   1.210 +	u32 num_domains;	/* # of coherence domains */
   1.211 +	u64 domain_info;	/* physical address of domain info table */
   1.212 +} ia64_sal_desc_ptc_t;
   1.213 +
   1.214 +typedef struct ia64_sal_ptc_domain_info {
   1.215 +	u64 proc_count;		/* number of processors in domain */
   1.216 +	u64 proc_list;		/* physical address of LID array */
   1.217 +} ia64_sal_ptc_domain_info_t;
   1.218 +
   1.219 +typedef struct ia64_sal_ptc_domain_proc_entry {
   1.220 +	u64 id  : 8;		/* id of processor */
   1.221 +	u64 eid : 8;		/* eid of processor */
   1.222 +} ia64_sal_ptc_domain_proc_entry_t;
   1.223 +
   1.224 +
   1.225 +#define IA64_SAL_AP_EXTERNAL_INT 0
   1.226 +
   1.227 +typedef struct ia64_sal_desc_ap_wakeup {
   1.228 +	u8 type;
   1.229 +	u8 mechanism;		/* 0 == external interrupt */
   1.230 +	u8 reserved1[6];
   1.231 +	u64 vector;		/* interrupt vector in range 0x10-0xff */
   1.232 +} ia64_sal_desc_ap_wakeup_t ;
   1.233 +
   1.234 +extern ia64_sal_handler ia64_sal;
   1.235 +extern struct ia64_sal_desc_ptc *ia64_ptc_domain_info;
   1.236 +
   1.237 +extern unsigned short sal_revision;	/* supported SAL spec revision */
   1.238 +extern unsigned short sal_version;	/* SAL version; OEM dependent */
   1.239 +#define SAL_VERSION_CODE(major, minor) ((BIN2BCD(major) << 8) | BIN2BCD(minor))
   1.240 +
   1.241 +extern const char *ia64_sal_strerror (long status);
   1.242 +extern void ia64_sal_init (struct ia64_sal_systab *sal_systab);
   1.243 +
   1.244 +/* SAL information type encodings */
   1.245 +enum {
   1.246 +	SAL_INFO_TYPE_MCA  = 0,		/* Machine check abort information */
   1.247 +        SAL_INFO_TYPE_INIT = 1,		/* Init information */
   1.248 +        SAL_INFO_TYPE_CMC  = 2,		/* Corrected machine check information */
   1.249 +        SAL_INFO_TYPE_CPE  = 3		/* Corrected platform error information */
   1.250 +};
   1.251 +
   1.252 +/* Encodings for machine check parameter types */
   1.253 +enum {
   1.254 +	SAL_MC_PARAM_RENDEZ_INT    = 1,	/* Rendezvous interrupt */
   1.255 +	SAL_MC_PARAM_RENDEZ_WAKEUP = 2,	/* Wakeup */
   1.256 +	SAL_MC_PARAM_CPE_INT	   = 3	/* Corrected Platform Error Int */
   1.257 +};
   1.258 +
   1.259 +/* Encodings for rendezvous mechanisms */
   1.260 +enum {
   1.261 +	SAL_MC_PARAM_MECHANISM_INT = 1,	/* Use interrupt */
   1.262 +	SAL_MC_PARAM_MECHANISM_MEM = 2	/* Use memory synchronization variable*/
   1.263 +};
   1.264 +
   1.265 +/* Encodings for vectors which can be registered by the OS with SAL */
   1.266 +enum {
   1.267 +	SAL_VECTOR_OS_MCA	  = 0,
   1.268 +	SAL_VECTOR_OS_INIT	  = 1,
   1.269 +	SAL_VECTOR_OS_BOOT_RENDEZ = 2
   1.270 +};
   1.271 +
   1.272 +/* Encodings for mca_opt parameter sent to SAL_MC_SET_PARAMS */
   1.273 +#define	SAL_MC_PARAM_RZ_ALWAYS		0x1
   1.274 +#define	SAL_MC_PARAM_BINIT_ESCALATE	0x10
   1.275 +
   1.276 +/*
   1.277 + * Definition of the SAL Error Log from the SAL spec
   1.278 + */
   1.279 +
   1.280 +/* SAL Error Record Section GUID Definitions */
   1.281 +#define SAL_PROC_DEV_ERR_SECT_GUID  \
   1.282 +    EFI_GUID(0xe429faf1, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   1.283 +#define SAL_PLAT_MEM_DEV_ERR_SECT_GUID  \
   1.284 +    EFI_GUID(0xe429faf2, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   1.285 +#define SAL_PLAT_SEL_DEV_ERR_SECT_GUID  \
   1.286 +    EFI_GUID(0xe429faf3, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   1.287 +#define SAL_PLAT_PCI_BUS_ERR_SECT_GUID  \
   1.288 +    EFI_GUID(0xe429faf4, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   1.289 +#define SAL_PLAT_SMBIOS_DEV_ERR_SECT_GUID  \
   1.290 +    EFI_GUID(0xe429faf5, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   1.291 +#define SAL_PLAT_PCI_COMP_ERR_SECT_GUID  \
   1.292 +    EFI_GUID(0xe429faf6, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   1.293 +#define SAL_PLAT_SPECIFIC_ERR_SECT_GUID  \
   1.294 +    EFI_GUID(0xe429faf7, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   1.295 +#define SAL_PLAT_HOST_CTLR_ERR_SECT_GUID  \
   1.296 +    EFI_GUID(0xe429faf8, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   1.297 +#define SAL_PLAT_BUS_ERR_SECT_GUID  \
   1.298 +    EFI_GUID(0xe429faf9, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   1.299 +
   1.300 +#define MAX_CACHE_ERRORS	6
   1.301 +#define MAX_TLB_ERRORS		6
   1.302 +#define MAX_BUS_ERRORS		1
   1.303 +
   1.304 +/* Definition of version  according to SAL spec for logging purposes */
   1.305 +typedef struct sal_log_revision {
   1.306 +	u8 minor;		/* BCD (0..99) */
   1.307 +	u8 major;		/* BCD (0..99) */
   1.308 +} sal_log_revision_t;
   1.309 +
   1.310 +/* Definition of timestamp according to SAL spec for logging purposes */
   1.311 +typedef struct sal_log_timestamp {
   1.312 +	u8 slh_second;		/* Second (0..59) */
   1.313 +	u8 slh_minute;		/* Minute (0..59) */
   1.314 +	u8 slh_hour;		/* Hour (0..23) */
   1.315 +	u8 slh_reserved;
   1.316 +	u8 slh_day;		/* Day (1..31) */
   1.317 +	u8 slh_month;		/* Month (1..12) */
   1.318 +	u8 slh_year;		/* Year (00..99) */
   1.319 +	u8 slh_century;		/* Century (19, 20, 21, ...) */
   1.320 +} sal_log_timestamp_t;
   1.321 +
   1.322 +/* Definition of log record  header structures */
   1.323 +typedef struct sal_log_record_header {
   1.324 +	u64 id;				/* Unique monotonically increasing ID */
   1.325 +	sal_log_revision_t revision;	/* Major and Minor revision of header */
   1.326 +	u8 severity;			/* Error Severity */
   1.327 +	u8 validation_bits;		/* 0: platform_guid, 1: !timestamp */
   1.328 +	u32 len;			/* Length of this error log in bytes */
   1.329 +	sal_log_timestamp_t timestamp;	/* Timestamp */
   1.330 +	efi_guid_t platform_guid;	/* Unique OEM Platform ID */
   1.331 +} sal_log_record_header_t;
   1.332 +
   1.333 +#define sal_log_severity_recoverable	0
   1.334 +#define sal_log_severity_fatal		1
   1.335 +#define sal_log_severity_corrected	2
   1.336 +
   1.337 +/* Definition of log section header structures */
   1.338 +typedef struct sal_log_sec_header {
   1.339 +    efi_guid_t guid;			/* Unique Section ID */
   1.340 +    sal_log_revision_t revision;	/* Major and Minor revision of Section */
   1.341 +    u16 reserved;
   1.342 +    u32 len;				/* Section length */
   1.343 +} sal_log_section_hdr_t;
   1.344 +
   1.345 +typedef struct sal_log_mod_error_info {
   1.346 +	struct {
   1.347 +		u64 check_info              : 1,
   1.348 +		    requestor_identifier    : 1,
   1.349 +		    responder_identifier    : 1,
   1.350 +		    target_identifier       : 1,
   1.351 +		    precise_ip              : 1,
   1.352 +		    reserved                : 59;
   1.353 +	} valid;
   1.354 +	u64 check_info;
   1.355 +	u64 requestor_identifier;
   1.356 +	u64 responder_identifier;
   1.357 +	u64 target_identifier;
   1.358 +	u64 precise_ip;
   1.359 +} sal_log_mod_error_info_t;
   1.360 +
   1.361 +typedef struct sal_processor_static_info {
   1.362 +	struct {
   1.363 +		u64 minstate        : 1,
   1.364 +		    br              : 1,
   1.365 +		    cr              : 1,
   1.366 +		    ar              : 1,
   1.367 +		    rr              : 1,
   1.368 +		    fr              : 1,
   1.369 +		    reserved        : 58;
   1.370 +	} valid;
   1.371 +	pal_min_state_area_t min_state_area;
   1.372 +	u64 br[8];
   1.373 +	u64 cr[128];
   1.374 +	u64 ar[128];
   1.375 +	u64 rr[8];
   1.376 +	struct ia64_fpreg __attribute__ ((packed)) fr[128];
   1.377 +} sal_processor_static_info_t;
   1.378 +
   1.379 +struct sal_cpuid_info {
   1.380 +	u64 regs[5];
   1.381 +	u64 reserved;
   1.382 +};
   1.383 +
   1.384 +typedef struct sal_log_processor_info {
   1.385 +	sal_log_section_hdr_t header;
   1.386 +	struct {
   1.387 +		u64 proc_error_map      : 1,
   1.388 +		    proc_state_param    : 1,
   1.389 +		    proc_cr_lid         : 1,
   1.390 +		    psi_static_struct   : 1,
   1.391 +		    num_cache_check     : 4,
   1.392 +		    num_tlb_check       : 4,
   1.393 +		    num_bus_check       : 4,
   1.394 +		    num_reg_file_check  : 4,
   1.395 +		    num_ms_check        : 4,
   1.396 +		    cpuid_info          : 1,
   1.397 +		    reserved1           : 39;
   1.398 +	} valid;
   1.399 +	u64 proc_error_map;
   1.400 +	u64 proc_state_parameter;
   1.401 +	u64 proc_cr_lid;
   1.402 +	/*
   1.403 +	 * The rest of this structure consists of variable-length arrays, which can't be
   1.404 +	 * expressed in C.
   1.405 +	 */
   1.406 +	sal_log_mod_error_info_t info[0];
   1.407 +	/*
   1.408 +	 * This is what the rest looked like if C supported variable-length arrays:
   1.409 +	 *
   1.410 +	 * sal_log_mod_error_info_t cache_check_info[.valid.num_cache_check];
   1.411 +	 * sal_log_mod_error_info_t tlb_check_info[.valid.num_tlb_check];
   1.412 +	 * sal_log_mod_error_info_t bus_check_info[.valid.num_bus_check];
   1.413 +	 * sal_log_mod_error_info_t reg_file_check_info[.valid.num_reg_file_check];
   1.414 +	 * sal_log_mod_error_info_t ms_check_info[.valid.num_ms_check];
   1.415 +	 * struct sal_cpuid_info cpuid_info;
   1.416 +	 * sal_processor_static_info_t processor_static_info;
   1.417 +	 */
   1.418 +} sal_log_processor_info_t;
   1.419 +
   1.420 +/* Given a sal_log_processor_info_t pointer, return a pointer to the processor_static_info: */
   1.421 +#define SAL_LPI_PSI_INFO(l)									\
   1.422 +({	sal_log_processor_info_t *_l = (l);							\
   1.423 +	((sal_processor_static_info_t *)							\
   1.424 +	 ((char *) _l->info + ((_l->valid.num_cache_check + _l->valid.num_tlb_check		\
   1.425 +				+ _l->valid.num_bus_check + _l->valid.num_reg_file_check	\
   1.426 +				+ _l->valid.num_ms_check) * sizeof(sal_log_mod_error_info_t)	\
   1.427 +			       + sizeof(struct sal_cpuid_info))));				\
   1.428 +})
   1.429 +
   1.430 +/* platform error log structures */
   1.431 +
   1.432 +typedef struct sal_log_mem_dev_err_info {
   1.433 +	sal_log_section_hdr_t header;
   1.434 +	struct {
   1.435 +		u64 error_status    : 1,
   1.436 +		    physical_addr   : 1,
   1.437 +		    addr_mask       : 1,
   1.438 +		    node            : 1,
   1.439 +		    card            : 1,
   1.440 +		    module          : 1,
   1.441 +		    bank            : 1,
   1.442 +		    device          : 1,
   1.443 +		    row             : 1,
   1.444 +		    column          : 1,
   1.445 +		    bit_position    : 1,
   1.446 +		    requestor_id    : 1,
   1.447 +		    responder_id    : 1,
   1.448 +		    target_id       : 1,
   1.449 +		    bus_spec_data   : 1,
   1.450 +		    oem_id          : 1,
   1.451 +		    oem_data        : 1,
   1.452 +		    reserved        : 47;
   1.453 +	} valid;
   1.454 +	u64 error_status;
   1.455 +	u64 physical_addr;
   1.456 +	u64 addr_mask;
   1.457 +	u16 node;
   1.458 +	u16 card;
   1.459 +	u16 module;
   1.460 +	u16 bank;
   1.461 +	u16 device;
   1.462 +	u16 row;
   1.463 +	u16 column;
   1.464 +	u16 bit_position;
   1.465 +	u64 requestor_id;
   1.466 +	u64 responder_id;
   1.467 +	u64 target_id;
   1.468 +	u64 bus_spec_data;
   1.469 +	u8 oem_id[16];
   1.470 +	u8 oem_data[1];			/* Variable length data */
   1.471 +} sal_log_mem_dev_err_info_t;
   1.472 +
   1.473 +typedef struct sal_log_sel_dev_err_info {
   1.474 +	sal_log_section_hdr_t header;
   1.475 +	struct {
   1.476 +		u64 record_id       : 1,
   1.477 +		    record_type     : 1,
   1.478 +		    generator_id    : 1,
   1.479 +		    evm_rev         : 1,
   1.480 +		    sensor_type     : 1,
   1.481 +		    sensor_num      : 1,
   1.482 +		    event_dir       : 1,
   1.483 +		    event_data1     : 1,
   1.484 +		    event_data2     : 1,
   1.485 +		    event_data3     : 1,
   1.486 +		    reserved        : 54;
   1.487 +	} valid;
   1.488 +	u16 record_id;
   1.489 +	u8 record_type;
   1.490 +	u8 timestamp[4];
   1.491 +	u16 generator_id;
   1.492 +	u8 evm_rev;
   1.493 +	u8 sensor_type;
   1.494 +	u8 sensor_num;
   1.495 +	u8 event_dir;
   1.496 +	u8 event_data1;
   1.497 +	u8 event_data2;
   1.498 +	u8 event_data3;
   1.499 +} sal_log_sel_dev_err_info_t;
   1.500 +
   1.501 +typedef struct sal_log_pci_bus_err_info {
   1.502 +	sal_log_section_hdr_t header;
   1.503 +	struct {
   1.504 +		u64 err_status      : 1,
   1.505 +		    err_type        : 1,
   1.506 +		    bus_id          : 1,
   1.507 +		    bus_address     : 1,
   1.508 +		    bus_data        : 1,
   1.509 +		    bus_cmd         : 1,
   1.510 +		    requestor_id    : 1,
   1.511 +		    responder_id    : 1,
   1.512 +		    target_id       : 1,
   1.513 +		    oem_data        : 1,
   1.514 +		    reserved        : 54;
   1.515 +	} valid;
   1.516 +	u64 err_status;
   1.517 +	u16 err_type;
   1.518 +	u16 bus_id;
   1.519 +	u32 reserved;
   1.520 +	u64 bus_address;
   1.521 +	u64 bus_data;
   1.522 +	u64 bus_cmd;
   1.523 +	u64 requestor_id;
   1.524 +	u64 responder_id;
   1.525 +	u64 target_id;
   1.526 +	u8 oem_data[1];			/* Variable length data */
   1.527 +} sal_log_pci_bus_err_info_t;
   1.528 +
   1.529 +typedef struct sal_log_smbios_dev_err_info {
   1.530 +	sal_log_section_hdr_t header;
   1.531 +	struct {
   1.532 +		u64 event_type      : 1,
   1.533 +		    length          : 1,
   1.534 +		    time_stamp      : 1,
   1.535 +		    data            : 1,
   1.536 +		    reserved1       : 60;
   1.537 +	} valid;
   1.538 +	u8 event_type;
   1.539 +	u8 length;
   1.540 +	u8 time_stamp[6];
   1.541 +	u8 data[1];			/* data of variable length, length == slsmb_length */
   1.542 +} sal_log_smbios_dev_err_info_t;
   1.543 +
   1.544 +typedef struct sal_log_pci_comp_err_info {
   1.545 +	sal_log_section_hdr_t header;
   1.546 +	struct {
   1.547 +		u64 err_status      : 1,
   1.548 +		    comp_info       : 1,
   1.549 +		    num_mem_regs    : 1,
   1.550 +		    num_io_regs     : 1,
   1.551 +		    reg_data_pairs  : 1,
   1.552 +		    oem_data        : 1,
   1.553 +		    reserved        : 58;
   1.554 +	} valid;
   1.555 +	u64 err_status;
   1.556 +	struct {
   1.557 +		u16 vendor_id;
   1.558 +		u16 device_id;
   1.559 +		u8 class_code[3];
   1.560 +		u8 func_num;
   1.561 +		u8 dev_num;
   1.562 +		u8 bus_num;
   1.563 +		u8 seg_num;
   1.564 +		u8 reserved[5];
   1.565 +	} comp_info;
   1.566 +	u32 num_mem_regs;
   1.567 +	u32 num_io_regs;
   1.568 +	u64 reg_data_pairs[1];
   1.569 +	/*
   1.570 +	 * array of address/data register pairs is num_mem_regs + num_io_regs elements
   1.571 +	 * long.  Each array element consists of a u64 address followed by a u64 data
   1.572 +	 * value.  The oem_data array immediately follows the reg_data_pairs array
   1.573 +	 */
   1.574 +	u8 oem_data[1];			/* Variable length data */
   1.575 +} sal_log_pci_comp_err_info_t;
   1.576 +
   1.577 +typedef struct sal_log_plat_specific_err_info {
   1.578 +	sal_log_section_hdr_t header;
   1.579 +	struct {
   1.580 +		u64 err_status      : 1,
   1.581 +		    guid            : 1,
   1.582 +		    oem_data        : 1,
   1.583 +		    reserved        : 61;
   1.584 +	} valid;
   1.585 +	u64 err_status;
   1.586 +	efi_guid_t guid;
   1.587 +	u8 oem_data[1];			/* platform specific variable length data */
   1.588 +} sal_log_plat_specific_err_info_t;
   1.589 +
   1.590 +typedef struct sal_log_host_ctlr_err_info {
   1.591 +	sal_log_section_hdr_t header;
   1.592 +	struct {
   1.593 +		u64 err_status      : 1,
   1.594 +		    requestor_id    : 1,
   1.595 +		    responder_id    : 1,
   1.596 +		    target_id       : 1,
   1.597 +		    bus_spec_data   : 1,
   1.598 +		    oem_data        : 1,
   1.599 +		    reserved        : 58;
   1.600 +	} valid;
   1.601 +	u64 err_status;
   1.602 +	u64 requestor_id;
   1.603 +	u64 responder_id;
   1.604 +	u64 target_id;
   1.605 +	u64 bus_spec_data;
   1.606 +	u8 oem_data[1];			/* Variable length OEM data */
   1.607 +} sal_log_host_ctlr_err_info_t;
   1.608 +
   1.609 +typedef struct sal_log_plat_bus_err_info {
   1.610 +	sal_log_section_hdr_t header;
   1.611 +	struct {
   1.612 +		u64 err_status      : 1,
   1.613 +		    requestor_id    : 1,
   1.614 +		    responder_id    : 1,
   1.615 +		    target_id       : 1,
   1.616 +		    bus_spec_data   : 1,
   1.617 +		    oem_data        : 1,
   1.618 +		    reserved        : 58;
   1.619 +	} valid;
   1.620 +	u64 err_status;
   1.621 +	u64 requestor_id;
   1.622 +	u64 responder_id;
   1.623 +	u64 target_id;
   1.624 +	u64 bus_spec_data;
   1.625 +	u8 oem_data[1];			/* Variable length OEM data */
   1.626 +} sal_log_plat_bus_err_info_t;
   1.627 +
   1.628 +/* Overall platform error section structure */
   1.629 +typedef union sal_log_platform_err_info {
   1.630 +	sal_log_mem_dev_err_info_t mem_dev_err;
   1.631 +	sal_log_sel_dev_err_info_t sel_dev_err;
   1.632 +	sal_log_pci_bus_err_info_t pci_bus_err;
   1.633 +	sal_log_smbios_dev_err_info_t smbios_dev_err;
   1.634 +	sal_log_pci_comp_err_info_t pci_comp_err;
   1.635 +	sal_log_plat_specific_err_info_t plat_specific_err;
   1.636 +	sal_log_host_ctlr_err_info_t host_ctlr_err;
   1.637 +	sal_log_plat_bus_err_info_t plat_bus_err;
   1.638 +} sal_log_platform_err_info_t;
   1.639 +
   1.640 +/* SAL log over-all, multi-section error record structure (processor+platform) */
   1.641 +typedef struct err_rec {
   1.642 +	sal_log_record_header_t sal_elog_header;
   1.643 +	sal_log_processor_info_t proc_err;
   1.644 +	sal_log_platform_err_info_t plat_err;
   1.645 +	u8 oem_data_pad[1024];
   1.646 +} ia64_err_rec_t;
   1.647 +
   1.648 +/*
   1.649 + * Now define a couple of inline functions for improved type checking
   1.650 + * and convenience.
   1.651 + */
   1.652 +static inline long
   1.653 +ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second,
   1.654 +		    unsigned long *drift_info)
   1.655 +{
   1.656 +	struct ia64_sal_retval isrv;
   1.657 +
   1.658 +	SAL_CALL(isrv, SAL_FREQ_BASE, which, 0, 0, 0, 0, 0, 0);
   1.659 +	*ticks_per_second = isrv.v0;
   1.660 +	*drift_info = isrv.v1;
   1.661 +	return isrv.status;
   1.662 +}
   1.663 +
   1.664 +extern s64 ia64_sal_cache_flush (u64 cache_type);
   1.665 +
   1.666 +/* Initialize all the processor and platform level instruction and data caches */
   1.667 +static inline s64
   1.668 +ia64_sal_cache_init (void)
   1.669 +{
   1.670 +	struct ia64_sal_retval isrv;
   1.671 +	SAL_CALL(isrv, SAL_CACHE_INIT, 0, 0, 0, 0, 0, 0, 0);
   1.672 +	return isrv.status;
   1.673 +}
   1.674 +
   1.675 +/*
   1.676 + * Clear the processor and platform information logged by SAL with respect to the machine
   1.677 + * state at the time of MCA's, INITs, CMCs, or CPEs.
   1.678 + */
   1.679 +static inline s64
   1.680 +ia64_sal_clear_state_info (u64 sal_info_type)
   1.681 +{
   1.682 +	struct ia64_sal_retval isrv;
   1.683 +	SAL_CALL_REENTRANT(isrv, SAL_CLEAR_STATE_INFO, sal_info_type, 0,
   1.684 +	              0, 0, 0, 0, 0);
   1.685 +	return isrv.status;
   1.686 +}
   1.687 +
   1.688 +
   1.689 +/* Get the processor and platform information logged by SAL with respect to the machine
   1.690 + * state at the time of the MCAs, INITs, CMCs, or CPEs.
   1.691 + */
   1.692 +static inline u64
   1.693 +ia64_sal_get_state_info (u64 sal_info_type, u64 *sal_info)
   1.694 +{
   1.695 +	struct ia64_sal_retval isrv;
   1.696 +	SAL_CALL_REENTRANT(isrv, SAL_GET_STATE_INFO, sal_info_type, 0,
   1.697 +	              sal_info, 0, 0, 0, 0);
   1.698 +	if (isrv.status)
   1.699 +		return 0;
   1.700 +
   1.701 +	return isrv.v0;
   1.702 +}
   1.703 +
   1.704 +/*
   1.705 + * Get the maximum size of the information logged by SAL with respect to the machine state
   1.706 + * at the time of MCAs, INITs, CMCs, or CPEs.
   1.707 + */
   1.708 +static inline u64
   1.709 +ia64_sal_get_state_info_size (u64 sal_info_type)
   1.710 +{
   1.711 +	struct ia64_sal_retval isrv;
   1.712 +	SAL_CALL_REENTRANT(isrv, SAL_GET_STATE_INFO_SIZE, sal_info_type, 0,
   1.713 +	              0, 0, 0, 0, 0);
   1.714 +	if (isrv.status)
   1.715 +		return 0;
   1.716 +	return isrv.v0;
   1.717 +}
   1.718 +
   1.719 +/*
   1.720 + * Causes the processor to go into a spin loop within SAL where SAL awaits a wakeup from
   1.721 + * the monarch processor.  Must not lock, because it will not return on any cpu until the
   1.722 + * monarch processor sends a wake up.
   1.723 + */
   1.724 +static inline s64
   1.725 +ia64_sal_mc_rendez (void)
   1.726 +{
   1.727 +	struct ia64_sal_retval isrv;
   1.728 +	SAL_CALL_NOLOCK(isrv, SAL_MC_RENDEZ, 0, 0, 0, 0, 0, 0, 0);
   1.729 +	return isrv.status;
   1.730 +}
   1.731 +
   1.732 +/*
   1.733 + * Allow the OS to specify the interrupt number to be used by SAL to interrupt OS during
   1.734 + * the machine check rendezvous sequence as well as the mechanism to wake up the
   1.735 + * non-monarch processor at the end of machine check processing.
   1.736 + * Returns the complete ia64_sal_retval because some calls return more than just a status
   1.737 + * value.
   1.738 + */
   1.739 +static inline struct ia64_sal_retval
   1.740 +ia64_sal_mc_set_params (u64 param_type, u64 i_or_m, u64 i_or_m_val, u64 timeout, u64 rz_always)
   1.741 +{
   1.742 +	struct ia64_sal_retval isrv;
   1.743 +	SAL_CALL(isrv, SAL_MC_SET_PARAMS, param_type, i_or_m, i_or_m_val,
   1.744 +		 timeout, rz_always, 0, 0);
   1.745 +	return isrv;
   1.746 +}
   1.747 +
   1.748 +/* Read from PCI configuration space */
   1.749 +static inline s64
   1.750 +ia64_sal_pci_config_read (u64 pci_config_addr, int type, u64 size, u64 *value)
   1.751 +{
   1.752 +	struct ia64_sal_retval isrv;
   1.753 +	SAL_CALL(isrv, SAL_PCI_CONFIG_READ, pci_config_addr, size, type, 0, 0, 0, 0);
   1.754 +	if (value)
   1.755 +		*value = isrv.v0;
   1.756 +	return isrv.status;
   1.757 +}
   1.758 +
   1.759 +/* Write to PCI configuration space */
   1.760 +static inline s64
   1.761 +ia64_sal_pci_config_write (u64 pci_config_addr, int type, u64 size, u64 value)
   1.762 +{
   1.763 +	struct ia64_sal_retval isrv;
   1.764 +	SAL_CALL(isrv, SAL_PCI_CONFIG_WRITE, pci_config_addr, size, value,
   1.765 +	         type, 0, 0, 0);
   1.766 +	return isrv.status;
   1.767 +}
   1.768 +
   1.769 +/*
   1.770 + * Register physical addresses of locations needed by SAL when SAL procedures are invoked
   1.771 + * in virtual mode.
   1.772 + */
   1.773 +static inline s64
   1.774 +ia64_sal_register_physical_addr (u64 phys_entry, u64 phys_addr)
   1.775 +{
   1.776 +	struct ia64_sal_retval isrv;
   1.777 +	SAL_CALL(isrv, SAL_REGISTER_PHYSICAL_ADDR, phys_entry, phys_addr,
   1.778 +	         0, 0, 0, 0, 0);
   1.779 +	return isrv.status;
   1.780 +}
   1.781 +
   1.782 +/*
   1.783 + * Register software dependent code locations within SAL. These locations are handlers or
   1.784 + * entry points where SAL will pass control for the specified event. These event handlers
   1.785 + * are for the bott rendezvous, MCAs and INIT scenarios.
   1.786 + */
   1.787 +static inline s64
   1.788 +ia64_sal_set_vectors (u64 vector_type,
   1.789 +		      u64 handler_addr1, u64 gp1, u64 handler_len1,
   1.790 +		      u64 handler_addr2, u64 gp2, u64 handler_len2)
   1.791 +{
   1.792 +	struct ia64_sal_retval isrv;
   1.793 +	SAL_CALL(isrv, SAL_SET_VECTORS, vector_type,
   1.794 +			handler_addr1, gp1, handler_len1,
   1.795 +			handler_addr2, gp2, handler_len2);
   1.796 +
   1.797 +	return isrv.status;
   1.798 +}
   1.799 +
   1.800 +/* Update the contents of PAL block in the non-volatile storage device */
   1.801 +static inline s64
   1.802 +ia64_sal_update_pal (u64 param_buf, u64 scratch_buf, u64 scratch_buf_size,
   1.803 +		     u64 *error_code, u64 *scratch_buf_size_needed)
   1.804 +{
   1.805 +	struct ia64_sal_retval isrv;
   1.806 +	SAL_CALL(isrv, SAL_UPDATE_PAL, param_buf, scratch_buf, scratch_buf_size,
   1.807 +	         0, 0, 0, 0);
   1.808 +	if (error_code)
   1.809 +		*error_code = isrv.v0;
   1.810 +	if (scratch_buf_size_needed)
   1.811 +		*scratch_buf_size_needed = isrv.v1;
   1.812 +	return isrv.status;
   1.813 +}
   1.814 +
   1.815 +/* Get physical processor die mapping in the platform. */
   1.816 +static inline s64
   1.817 +ia64_sal_physical_id_info(u16 *splid)
   1.818 +{
   1.819 +	struct ia64_sal_retval isrv;
   1.820 +	SAL_CALL(isrv, SAL_PHYSICAL_ID_INFO, 0, 0, 0, 0, 0, 0, 0);
   1.821 +	if (splid)
   1.822 +		*splid = isrv.v0;
   1.823 +	return isrv.status;
   1.824 +}
   1.825 +
   1.826 +extern unsigned long sal_platform_features;
   1.827 +
   1.828 +extern int (*salinfo_platform_oemdata)(const u8 *, u8 **, u64 *);
   1.829 +
   1.830 +struct sal_ret_values {
   1.831 +	long r8; long r9; long r10; long r11;
   1.832 +};
   1.833 +
   1.834 +#define IA64_SAL_OEMFUNC_MIN		0x02000000
   1.835 +#define IA64_SAL_OEMFUNC_MAX		0x03ffffff
   1.836 +
   1.837 +extern int ia64_sal_oemcall(struct ia64_sal_retval *, u64, u64, u64, u64, u64,
   1.838 +			    u64, u64, u64);
   1.839 +extern int ia64_sal_oemcall_nolock(struct ia64_sal_retval *, u64, u64, u64,
   1.840 +				   u64, u64, u64, u64, u64);
   1.841 +extern int ia64_sal_oemcall_reentrant(struct ia64_sal_retval *, u64, u64, u64,
   1.842 +				      u64, u64, u64, u64, u64);
   1.843 +#ifdef CONFIG_HOTPLUG_CPU
   1.844 +/*
   1.845 + * System Abstraction Layer Specification
   1.846 + * Section 3.2.5.1: OS_BOOT_RENDEZ to SAL return State.
   1.847 + * Note: region regs are stored first in head.S _start. Hence they must
   1.848 + * stay up front.
   1.849 + */
   1.850 +struct sal_to_os_boot {
   1.851 +	u64 rr[8];		/* Region Registers */
   1.852 +	u64	br[6];		/* br0: return addr into SAL boot rendez routine */
   1.853 +	u64 gr1;		/* SAL:GP */
   1.854 +	u64 gr12;		/* SAL:SP */
   1.855 +	u64 gr13;		/* SAL: Task Pointer */
   1.856 +	u64 fpsr;
   1.857 +	u64	pfs;
   1.858 +	u64 rnat;
   1.859 +	u64 unat;
   1.860 +	u64 bspstore;
   1.861 +	u64 dcr;		/* Default Control Register */
   1.862 +	u64 iva;
   1.863 +	u64 pta;
   1.864 +	u64 itv;
   1.865 +	u64 pmv;
   1.866 +	u64 cmcv;
   1.867 +	u64 lrr[2];
   1.868 +	u64 gr[4];
   1.869 +	u64 pr;			/* Predicate registers */
   1.870 +	u64 lc;			/* Loop Count */
   1.871 +	struct ia64_fpreg fp[20];
   1.872 +};
   1.873 +
   1.874 +/*
   1.875 + * Global array allocated for NR_CPUS at boot time
   1.876 + */
   1.877 +extern struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS];
   1.878 +
   1.879 +extern void ia64_jump_to_sal(struct sal_to_os_boot *);
   1.880 +#endif
   1.881 +
   1.882 +extern void ia64_sal_handler_init(void *entry_point, void *gpval);
   1.883 +
   1.884 +#endif /* __ASSEMBLY__ */
   1.885 +
   1.886 +#endif /* _ASM_IA64_SAL_H */