direct-io.hg

changeset 10433:588e1aef89e8

[HVM] ACPI support patch 1 of 4: main components.

The patch support ACPI UP Guest Windows 2000, XP and 2003, based on
this we are going to add more support on SMP and 64bit Windows( which
are only working in ACPI mode) later. We tested: in ia32 guest:

a. Installation and boot of Windows XP sp2 and 2003 server in ACPI
mode
b when boot to both window, no yellow mark in device manger and USB,
network card and IDE DMA are working.
c. clean boot (without ACPI related errors) on UP and 4 vcpu rhel4u1
SMP guest and got ioapic Interrupt assigned according to ACPI DSDT
table's _PRT table's GSI.

To minimize the implementation efforts to satisfy the ACPI OS
installation and boot, we implemented ACPI only event logical model by
emulating ACPI hardware based on PIIX4 (Intel 82371ab) by: Populating
the PIIX4 ACPI bridge PCI configuration space; Adding ACPI timer
(required during windows installation/boot), PM1 event register block
and PM1 control register block (both are required during
installation/boot, shutdown, entering and leaving PM S state if adding
those features later), we provided full ACPI hardware registers above
using byte/word/dword access per ACPI spec requirement.

The patch also fixed many existing hvm ACPI related bugs, such as
warnings when boot to ACPI UP and SMP guest Linux OS; adding new ACPI
_PRT table reporting PCI IRQ routing table in PIC mode, adding new _PRT
table in APIC mode, that fixed no IRQ GSI cause it is forced to shutdown
when OS find new device to assign IRQ without ACPI event service; The
patch also fixed the ACPI DSDT table's PCI resource conflict with guest
e820 table when booting and installing ACPI Windows; we also added ACPI
shutdown service by incorporating the code in ACPI "hardware enable
register writer" from Ben's Virtual Iron's team's patch in changeset
9989:f8d20c3e4225.

We only provide minimum power management requirement support per spec-c1
and S5 for shutdown, may be S4 (hibernating which is meaningful for user
to save their working section) in the future.

Please note, current patch needs to have following switches in guest
configuration to enable proper ACPI support
a. need to add ACPI=1 (apic=1 if boot SMP Linux guest plus vcpu=
number want to test) in xmexample.hvm
b. need to add USB support: USB=1 and usbdevice='device' (or
='tablet') as the pm register base is static..., I will adding dynamic
ACPI FADT table for pm register base pointer later.

When installing guest OS in ACPI mode, need to manually tell Windows
setup program to install single core ACPI HAL:
After passing the 1st screen of windows setup of install Windows,
the first thing you'll see at the bottom of the screen is the
option to press F6 if you need to install a SCSI or RAID
controller. Don't press F6. Press F5 instead. This will take
you to a separate menu of Hardware Abstraction Layer's where
you can choose an appropriate HAL .The choices will be:

ACPI Multiprocessor PC
ACPI Uniprocessor PC
Advanced Configuration and Power Interface (ACPI) PC
...
Standard PC
Standard PC with C-Step i486

Please select "Advanced Configuration and Power Interface (ACPI) PC"
using current patch.

Signed-off-by: Winston Wang <winston.l.wang@intel.com>
author kaf24@firebug.cl.cam.ac.uk
date Sat Jun 17 09:00:16 2006 +0100 (2006-06-17)
parents 0849bb1b73f9
children 5c533b9e2d3f
files tools/firmware/acpi/Makefile tools/firmware/acpi/acpi2_0.h tools/firmware/acpi/acpi_dsdt.asl tools/firmware/acpi/acpi_dsdt.c tools/firmware/acpi/acpi_fadt.h tools/ioemu/hw/pc.c tools/ioemu/hw/pci.c tools/ioemu/hw/piix4acpi.c tools/ioemu/target-i386-dm/Makefile
line diff
     1.1 --- a/tools/firmware/acpi/Makefile	Sat Jun 17 08:56:02 2006 +0100
     1.2 +++ b/tools/firmware/acpi/Makefile	Sat Jun 17 09:00:16 2006 +0100
     1.3 @@ -33,17 +33,16 @@ IASL_VER=acpica-unix-20050513
     1.4  IASL_URL=http://developer.intel.com/technology/iapc/acpi/downloads/$(IASL_VER).tar.gz
     1.5  
     1.6  vpath iasl $(PATH)
     1.7 -.PHONY: all
     1.8  all:$(ACPI_BIN)
     1.9  
    1.10  acpi_dsdt.c:acpi_dsdt.asl
    1.11  	$(MAKE) iasl
    1.12 -	iasl -oa -tc acpi_dsdt.asl
    1.13 +	iasl  -tc acpi_dsdt.asl
    1.14  	mv acpi_dsdt.hex acpi_dsdt.c
    1.15  	echo "int DsdtLen=sizeof(AmlCode);" >> acpi_dsdt.c
    1.16  	rm *.aml
    1.17 +#        iasl -oa -tc acpi_dsdt.asl
    1.18  
    1.19 -.PHONY: iasl
    1.20  iasl:
    1.21  	@echo
    1.22  	@echo "ACPI ASL compiler(iasl) is needed"
    1.23 @@ -62,10 +61,8 @@ iasl:
    1.24  $(ACPI_BIN):$(ACPI_GEN)
    1.25  	./$(ACPI_GEN) $(ACPI_BIN)
    1.26  
    1.27 -.PHONY: clean
    1.28  clean:
    1.29  	rm -rf *.o $(ACPI_GEN) $(ACPI_BIN) $(IASL_VER) 
    1.30  	rm -rf  $(IASL_VER).tar.gz
    1.31  
    1.32 -.PHONY: install
    1.33  install: all
     2.1 --- a/tools/firmware/acpi/acpi2_0.h	Sat Jun 17 08:56:02 2006 +0100
     2.2 +++ b/tools/firmware/acpi/acpi2_0.h	Sat Jun 17 09:00:16 2006 +0100
     2.3 @@ -323,7 +323,7 @@ typedef struct {
     2.4  // The physical that acpi table reside in the guest BIOS
     2.5  //#define ACPI_PHYSICAL_ADDRESS 0xE2000
     2.6  #define ACPI_PHYSICAL_ADDRESS 0xEA000
     2.7 -#define ACPI_TABLE_SIZE (2*1024)  //Currently 2K is enough
     2.8 +#define ACPI_TABLE_SIZE (4*1024)  //Currently 4K is enough
     2.9  
    2.10  void
    2.11  AcpiBuildTable(uint8_t* buf);
     3.1 --- a/tools/firmware/acpi/acpi_dsdt.asl	Sat Jun 17 08:56:02 2006 +0100
     3.2 +++ b/tools/firmware/acpi/acpi_dsdt.asl	Sat Jun 17 09:00:16 2006 +0100
     3.3 @@ -20,7 +20,7 @@
     3.4  //**
     3.5  //**
     3.6  
     3.7 -DefinitionBlock ("DSDT.aml", "DSDT", 1, "INTEL ", "XEN     ", 2)
     3.8 +DefinitionBlock ("DSDT.aml", "DSDT", 1, "INTEL","int-xen", 2006)
     3.9  {
    3.10      Name (\PMBS, 0x0C00)
    3.11      Name (\PMLN, 0x08)
    3.12 @@ -29,23 +29,16 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, 
    3.13      Name (\APCB, 0xFEC00000)
    3.14      Name (\APCL, 0x00010000)
    3.15      Name (\PUID, 0x00)
    3.16 +
    3.17      Scope (\_PR)
    3.18      {
    3.19          Processor (CPU0, 0x00, 0x00000000, 0x00) {}
    3.20          Processor (CPU1, 0x01, 0x00000000, 0x00) {}
    3.21          Processor (CPU2, 0x02, 0x00000000, 0x00) {}
    3.22          Processor (CPU3, 0x03, 0x00000000, 0x00) {}
    3.23 +
    3.24      }
    3.25  
    3.26 -/* Poweroff support - ties in with qemu emulation */
    3.27 -
    3.28 -    Name (\_S5, Package (0x04)
    3.29 -    {
    3.30 -        0x07, 
    3.31 -        0x07, 
    3.32 -        0x00, 
    3.33 -        0x00
    3.34 -    })
    3.35  
    3.36      Scope (\_SB)
    3.37      {
    3.38 @@ -55,9 +48,11 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, 
    3.39              Name (_UID, 0x00)
    3.40              Name (_ADR, 0x00)
    3.41              Name (_BBN, 0x00)
    3.42 + 
    3.43              Method (_CRS, 0, NotSerialized)
    3.44              {
    3.45 -                Name (PRT0, ResourceTemplate ()
    3.46 +          
    3.47 +               Name (PRT0, ResourceTemplate ()
    3.48                  {
    3.49  					/* bus number is from 0 - 255*/
    3.50                      WordBusNumber (ResourceConsumer, MinFixed, MaxFixed, SubDecode,
    3.51 @@ -79,75 +74,67 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, 
    3.52                          0x0FFF,
    3.53                          0x0000,
    3.54                          0x0300)
    3.55 +
    3.56 +                 /* reserve what device model consumed for IDE and acpi pci device            */
    3.57 +                     WordIO (ResourceConsumer, MinFixed, MaxFixed, PosDecode, EntireRange,
    3.58 +                        0x0000,
    3.59 +                        0xc000,
    3.60 +                        0xc01f,
    3.61 +                        0x0000,
    3.62 +                        0x0020)
    3.63 +                 /* reserve what device model consumed for Ethernet controller pci device        */
    3.64 +                     WordIO (ResourceConsumer, MinFixed, MaxFixed, PosDecode, EntireRange,
    3.65 +                        0x0000,
    3.66 +                        0xc020,
    3.67 +                        0xc03f,
    3.68 +                        0x0000,
    3.69 +                        0x0010)
    3.70 +
    3.71                      DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadOnly,
    3.72                          0x00000000,
    3.73 -                        0x000A0000,
    3.74 +                        0x000c0000,
    3.75                          0x000FFFFF,
    3.76                          0x00000000,
    3.77 -                        0x00060000)
    3.78 +                        0x00030000)
    3.79 +
    3.80 +                 /* reserve what device model consumed for PCI VGA device        */
    3.81 +
    3.82 +                    DWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
    3.83 +                        0x00000000,
    3.84 +                        0xF0000000,
    3.85 +                        0xF1FFFFFF,
    3.86 +                        0x00000000,
    3.87 +                        0x02000000)
    3.88 +                    DWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
    3.89 +                        0x00000000,
    3.90 +                        0xF2000000,
    3.91 +                        0xF2000FFF,
    3.92 +                        0x00000000,
    3.93 +                        0x00001000)
    3.94 +                 /* reserve what device model consumed for Ethernet controller pci device        */
    3.95 +                      DWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
    3.96 +                        0x00000000,
    3.97 +                        0xF2001000,
    3.98 +                        0xF200101F,
    3.99 +                        0x00000000,
   3.100 +                        0x00000020) 
   3.101                  })
   3.102                  Return (PRT0)
   3.103              }
   3.104 -
   3.105 -            Name (AIR0, Package (0x06)
   3.106 -            {
   3.107 -               Package (0x04)
   3.108 -                {
   3.109 -                    0x001FFFFF, 
   3.110 -                    0x02, 
   3.111 -                    0x00, 
   3.112 -                    0x17
   3.113 -                }, 
   3.114 -
   3.115 -                Package (0x04)
   3.116 -                {
   3.117 -                    0x001FFFFF, 
   3.118 -                    0x03, 
   3.119 -                    0x00, 
   3.120 -                    0x13
   3.121 -                }, 
   3.122 -
   3.123 -                Package (0x04)
   3.124 -                {
   3.125 -                    0x001DFFFF, 
   3.126 -                    0x01, 
   3.127 -                    0x00, 
   3.128 -                    0x13
   3.129 -                }, 
   3.130 -
   3.131 -                Package (0x04)
   3.132 -                {
   3.133 -                    0x001DFFFF, 
   3.134 -                    0x00, 
   3.135 -                    0x00, 
   3.136 -                    0x10
   3.137 -                }, 
   3.138 -
   3.139 -                Package (0x04)
   3.140 -                {
   3.141 -                    0x001DFFFF, 
   3.142 -                    0x02, 
   3.143 -                    0x00, 
   3.144 -                    0x12
   3.145 -                }, 
   3.146 -
   3.147 -                Package (0x04)
   3.148 -                {
   3.149 -                    0x001DFFFF, 
   3.150 -                    0x03, 
   3.151 -                    0x00, 
   3.152 -                    0x17
   3.153 -                }
   3.154 -            })
   3.155 -            Method (_PRT, 0, NotSerialized)
   3.156 -            {
   3.157 -                Return (AIR0)
   3.158 -            }
   3.159 -
   3.160 +   
   3.161              Device (ISA)
   3.162              {
   3.163 -                Name (_ADR, 0x00010000) /*TODO, device id, PCI bus num, ...*/
   3.164 -
   3.165 +                Name (_ADR, 0x00000000) /* device id, PCI bus num, ... */
   3.166 + 
   3.167 +		OperationRegion(PIRQ, PCI_Config, 0x60, 0x4)
   3.168 +                        Scope(\) {
   3.169 +                                Field (\_SB.PCI0.ISA.PIRQ, ByteAcc, NoLock, Preserve) {
   3.170 +                                        PIRA, 8,
   3.171 +                                        PIRB, 8,
   3.172 +                                        PIRC, 8,
   3.173 +                                        PIRD, 8
   3.174 +                                        }
   3.175 +                                }
   3.176                  Device (SYSR)
   3.177                  {
   3.178                      Name (_HID, EisaId ("PNP0C02"))
     4.1 --- a/tools/firmware/acpi/acpi_dsdt.c	Sat Jun 17 08:56:02 2006 +0100
     4.2 +++ b/tools/firmware/acpi/acpi_dsdt.c	Sat Jun 17 09:00:16 2006 +0100
     4.3 @@ -1,22 +1,22 @@
     4.4  /*
     4.5   * 
     4.6   * Intel ACPI Component Architecture
     4.7 - * ASL Optimizing Compiler / AML Disassembler version 20050624 [Aug 24 2005]
     4.8 + * ASL Optimizing Compiler / AML Disassembler version 20050513 [Jun  8 2005]
     4.9   * Copyright (C) 2000 - 2005 Intel Corporation
    4.10   * Supports ACPI Specification Revision 3.0
    4.11   * 
    4.12 - * Compilation of "acpi_dsdt.asl" - Thu May  4 17:42:00 2006
    4.13 + * Compilation of "acpi_dsdt.asl" - Thu Jun 15 16:01:53 2006
    4.14   * 
    4.15   * C source code output
    4.16   *
    4.17   */
    4.18  unsigned char AmlCode[] = 
    4.19  {
    4.20 -    0x44,0x53,0x44,0x54,0x7C,0x04,0x00,0x00,  /* 00000000    "DSDT|..." */
    4.21 -    0x01,0x72,0x49,0x4E,0x54,0x45,0x4C,0x20,  /* 00000008    ".rINTEL " */
    4.22 -    0x58,0x45,0x4E,0x20,0x20,0x20,0x20,0x20,  /* 00000010    "XEN     " */
    4.23 -    0x02,0x00,0x00,0x00,0x49,0x4E,0x54,0x4C,  /* 00000018    "....INTL" */
    4.24 -    0x24,0x06,0x05,0x20,0x08,0x50,0x4D,0x42,  /* 00000020    "$.. .PMB" */
    4.25 +    0x44,0x53,0x44,0x54,0xB1,0x04,0x00,0x00,  /* 00000000    "DSDT...." */
    4.26 +    0x01,0x13,0x49,0x4E,0x54,0x45,0x4C,0x00,  /* 00000008    "..INTEL." */
    4.27 +    0x69,0x6E,0x74,0x2D,0x78,0x65,0x6E,0x00,  /* 00000010    "int-xen." */
    4.28 +    0xD6,0x07,0x00,0x00,0x49,0x4E,0x54,0x4C,  /* 00000018    "....INTL" */
    4.29 +    0x13,0x05,0x05,0x20,0x08,0x50,0x4D,0x42,  /* 00000020    "... .PMB" */
    4.30      0x53,0x0B,0x00,0x0C,0x08,0x50,0x4D,0x4C,  /* 00000028    "S....PML" */
    4.31      0x4E,0x0A,0x08,0x08,0x49,0x4F,0x42,0x31,  /* 00000030    "N...IOB1" */
    4.32      0x00,0x08,0x49,0x4F,0x4C,0x31,0x00,0x08,  /* 00000038    "..IOL1.." */
    4.33 @@ -30,131 +30,138 @@ unsigned char AmlCode[] =
    4.34      0x00,0x5B,0x83,0x0B,0x43,0x50,0x55,0x32,  /* 00000078    ".[..CPU2" */
    4.35      0x02,0x00,0x00,0x00,0x00,0x00,0x5B,0x83,  /* 00000080    "......[." */
    4.36      0x0B,0x43,0x50,0x55,0x33,0x03,0x00,0x00,  /* 00000088    ".CPU3..." */
    4.37 -    0x00,0x00,0x00,0x08,0x5F,0x53,0x35,0x5F,  /* 00000090    "...._S5_" */
    4.38 -    0x12,0x08,0x04,0x0A,0x07,0x0A,0x07,0x00,  /* 00000098    "........" */
    4.39 -    0x00,0x10,0x4A,0x3D,0x5F,0x53,0x42,0x5F,  /* 000000A0    "..J=_SB_" */
    4.40 -    0x5B,0x82,0x42,0x3D,0x50,0x43,0x49,0x30,  /* 000000A8    "[.B=PCI0" */
    4.41 -    0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,  /* 000000B0    "._HID.A." */
    4.42 -    0x0A,0x03,0x08,0x5F,0x55,0x49,0x44,0x00,  /* 000000B8    "..._UID." */
    4.43 -    0x08,0x5F,0x41,0x44,0x52,0x00,0x08,0x5F,  /* 000000C0    "._ADR.._" */
    4.44 -    0x42,0x42,0x4E,0x00,0x14,0x4A,0x06,0x5F,  /* 000000C8    "BBN..J._" */
    4.45 -    0x43,0x52,0x53,0x00,0x08,0x50,0x52,0x54,  /* 000000D0    "CRS..PRT" */
    4.46 -    0x30,0x11,0x48,0x05,0x0A,0x54,0x88,0x0D,  /* 000000D8    "0.H..T.." */
    4.47 -    0x00,0x02,0x0F,0x00,0x00,0x00,0x00,0x00,  /* 000000E0    "........" */
    4.48 -    0xFF,0x00,0x00,0x00,0x00,0x01,0x47,0x01,  /* 000000E8    "......G." */
    4.49 -    0xF8,0x0C,0xF8,0x0C,0x01,0x08,0x88,0x0D,  /* 000000F0    "........" */
    4.50 -    0x00,0x01,0x0C,0x03,0x00,0x00,0x00,0x00,  /* 000000F8    "........" */
    4.51 -    0xF7,0x0C,0x00,0x00,0xF8,0x0C,0x88,0x0D,  /* 00000100    "........" */
    4.52 -    0x00,0x01,0x0C,0x03,0x00,0x00,0x00,0x0D,  /* 00000108    "........" */
    4.53 -    0xFF,0x0F,0x00,0x00,0x00,0x03,0x87,0x17,  /* 00000110    "........" */
    4.54 -    0x00,0x00,0x0C,0x02,0x00,0x00,0x00,0x00,  /* 00000118    "........" */
    4.55 -    0x00,0x00,0x0A,0x00,0xFF,0xFF,0x0F,0x00,  /* 00000120    "........" */
    4.56 -    0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x00,  /* 00000128    "........" */
    4.57 -    0x79,0x00,0xA4,0x50,0x52,0x54,0x30,0x08,  /* 00000130    "y..PRT0." */
    4.58 -    0x41,0x49,0x52,0x30,0x12,0x4F,0x04,0x06,  /* 00000138    "AIR0.O.." */
    4.59 -    0x12,0x0C,0x04,0x0C,0xFF,0xFF,0x1F,0x00,  /* 00000140    "........" */
    4.60 -    0x0A,0x02,0x00,0x0A,0x17,0x12,0x0C,0x04,  /* 00000148    "........" */
    4.61 -    0x0C,0xFF,0xFF,0x1F,0x00,0x0A,0x03,0x00,  /* 00000150    "........" */
    4.62 -    0x0A,0x13,0x12,0x0B,0x04,0x0C,0xFF,0xFF,  /* 00000158    "........" */
    4.63 -    0x1D,0x00,0x01,0x00,0x0A,0x13,0x12,0x0B,  /* 00000160    "........" */
    4.64 -    0x04,0x0C,0xFF,0xFF,0x1D,0x00,0x00,0x00,  /* 00000168    "........" */
    4.65 -    0x0A,0x10,0x12,0x0C,0x04,0x0C,0xFF,0xFF,  /* 00000170    "........" */
    4.66 -    0x1D,0x00,0x0A,0x02,0x00,0x0A,0x12,0x12,  /* 00000178    "........" */
    4.67 -    0x0C,0x04,0x0C,0xFF,0xFF,0x1D,0x00,0x0A,  /* 00000180    "........" */
    4.68 -    0x03,0x00,0x0A,0x17,0x14,0x0B,0x5F,0x50,  /* 00000188    "......_P" */
    4.69 -    0x52,0x54,0x00,0xA4,0x41,0x49,0x52,0x30,  /* 00000190    "RT..AIR0" */
    4.70 -    0x5B,0x82,0x42,0x2E,0x49,0x53,0x41,0x5F,  /* 00000198    "[.B.ISA_" */
    4.71 -    0x08,0x5F,0x41,0x44,0x52,0x0C,0x00,0x00,  /* 000001A0    "._ADR..." */
    4.72 -    0x01,0x00,0x5B,0x82,0x46,0x0B,0x53,0x59,  /* 000001A8    "..[.F.SY" */
    4.73 -    0x53,0x52,0x08,0x5F,0x48,0x49,0x44,0x0C,  /* 000001B0    "SR._HID." */
    4.74 -    0x41,0xD0,0x0C,0x02,0x08,0x5F,0x55,0x49,  /* 000001B8    "A...._UI" */
    4.75 -    0x44,0x01,0x08,0x43,0x52,0x53,0x5F,0x11,  /* 000001C0    "D..CRS_." */
    4.76 -    0x4E,0x08,0x0A,0x8A,0x47,0x01,0x10,0x00,  /* 000001C8    "N...G..." */
    4.77 -    0x10,0x00,0x00,0x10,0x47,0x01,0x22,0x00,  /* 000001D0    "....G."." */
    4.78 -    0x22,0x00,0x00,0x0C,0x47,0x01,0x30,0x00,  /* 000001D8    ""...G.0." */
    4.79 -    0x30,0x00,0x00,0x10,0x47,0x01,0x44,0x00,  /* 000001E0    "0...G.D." */
    4.80 -    0x44,0x00,0x00,0x1C,0x47,0x01,0x62,0x00,  /* 000001E8    "D...G.b." */
    4.81 -    0x62,0x00,0x00,0x02,0x47,0x01,0x65,0x00,  /* 000001F0    "b...G.e." */
    4.82 -    0x65,0x00,0x00,0x0B,0x47,0x01,0x72,0x00,  /* 000001F8    "e...G.r." */
    4.83 -    0x72,0x00,0x00,0x0E,0x47,0x01,0x80,0x00,  /* 00000200    "r...G..." */
    4.84 -    0x80,0x00,0x00,0x01,0x47,0x01,0x84,0x00,  /* 00000208    "....G..." */
    4.85 -    0x84,0x00,0x00,0x03,0x47,0x01,0x88,0x00,  /* 00000210    "....G..." */
    4.86 -    0x88,0x00,0x00,0x01,0x47,0x01,0x8C,0x00,  /* 00000218    "....G..." */
    4.87 -    0x8C,0x00,0x00,0x03,0x47,0x01,0x90,0x00,  /* 00000220    "....G..." */
    4.88 -    0x90,0x00,0x00,0x10,0x47,0x01,0xA2,0x00,  /* 00000228    "....G..." */
    4.89 -    0xA2,0x00,0x00,0x1C,0x47,0x01,0xE0,0x00,  /* 00000230    "....G..." */
    4.90 -    0xE0,0x00,0x00,0x10,0x47,0x01,0xA0,0x08,  /* 00000238    "....G..." */
    4.91 -    0xA0,0x08,0x00,0x04,0x47,0x01,0xC0,0x0C,  /* 00000240    "....G..." */
    4.92 -    0xC0,0x0C,0x00,0x10,0x47,0x01,0xD0,0x04,  /* 00000248    "....G..." */
    4.93 -    0xD0,0x04,0x00,0x02,0x79,0x00,0x14,0x0B,  /* 00000250    "....y..." */
    4.94 -    0x5F,0x43,0x52,0x53,0x00,0xA4,0x43,0x52,  /* 00000258    "_CRS..CR" */
    4.95 -    0x53,0x5F,0x5B,0x82,0x2B,0x50,0x49,0x43,  /* 00000260    "S_[.+PIC" */
    4.96 -    0x5F,0x08,0x5F,0x48,0x49,0x44,0x0B,0x41,  /* 00000268    "_._HID.A" */
    4.97 -    0xD0,0x08,0x5F,0x43,0x52,0x53,0x11,0x18,  /* 00000270    ".._CRS.." */
    4.98 -    0x0A,0x15,0x47,0x01,0x20,0x00,0x20,0x00,  /* 00000278    "..G. . ." */
    4.99 -    0x01,0x02,0x47,0x01,0xA0,0x00,0xA0,0x00,  /* 00000280    "..G....." */
   4.100 -    0x01,0x02,0x22,0x04,0x00,0x79,0x00,0x5B,  /* 00000288    ".."..y.[" */
   4.101 -    0x82,0x47,0x05,0x44,0x4D,0x41,0x30,0x08,  /* 00000290    ".G.DMA0." */
   4.102 -    0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,0x02,  /* 00000298    "_HID.A.." */
   4.103 -    0x00,0x08,0x5F,0x43,0x52,0x53,0x11,0x41,  /* 000002A0    ".._CRS.A" */
   4.104 -    0x04,0x0A,0x3D,0x2A,0x10,0x04,0x47,0x01,  /* 000002A8    "..=*..G." */
   4.105 -    0x00,0x00,0x00,0x00,0x00,0x10,0x47,0x01,  /* 000002B0    "......G." */
   4.106 -    0x81,0x00,0x81,0x00,0x00,0x03,0x47,0x01,  /* 000002B8    "......G." */
   4.107 -    0x87,0x00,0x87,0x00,0x00,0x01,0x47,0x01,  /* 000002C0    "......G." */
   4.108 -    0x89,0x00,0x89,0x00,0x00,0x03,0x47,0x01,  /* 000002C8    "......G." */
   4.109 -    0x8F,0x00,0x8F,0x00,0x00,0x01,0x47,0x01,  /* 000002D0    "......G." */
   4.110 -    0xC0,0x00,0xC0,0x00,0x00,0x20,0x47,0x01,  /* 000002D8    "..... G." */
   4.111 -    0x80,0x04,0x80,0x04,0x00,0x10,0x79,0x00,  /* 000002E0    "......y." */
   4.112 -    0x5B,0x82,0x25,0x54,0x4D,0x52,0x5F,0x08,  /* 000002E8    "[.%TMR_." */
   4.113 -    0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,0x01,  /* 000002F0    "_HID.A.." */
   4.114 -    0x00,0x08,0x5F,0x43,0x52,0x53,0x11,0x10,  /* 000002F8    ".._CRS.." */
   4.115 -    0x0A,0x0D,0x47,0x01,0x40,0x00,0x40,0x00,  /* 00000300    "..G.@.@." */
   4.116 -    0x00,0x04,0x22,0x01,0x00,0x79,0x00,0x5B,  /* 00000308    ".."..y.[" */
   4.117 -    0x82,0x25,0x52,0x54,0x43,0x5F,0x08,0x5F,  /* 00000310    ".%RTC_._" */
   4.118 -    0x48,0x49,0x44,0x0C,0x41,0xD0,0x0B,0x00,  /* 00000318    "HID.A..." */
   4.119 -    0x08,0x5F,0x43,0x52,0x53,0x11,0x10,0x0A,  /* 00000320    "._CRS..." */
   4.120 -    0x0D,0x47,0x01,0x70,0x00,0x70,0x00,0x00,  /* 00000328    ".G.p.p.." */
   4.121 -    0x02,0x22,0x00,0x01,0x79,0x00,0x5B,0x82,  /* 00000330    "."..y.[." */
   4.122 -    0x22,0x53,0x50,0x4B,0x52,0x08,0x5F,0x48,  /* 00000338    ""SPKR._H" */
   4.123 -    0x49,0x44,0x0C,0x41,0xD0,0x08,0x00,0x08,  /* 00000340    "ID.A...." */
   4.124 -    0x5F,0x43,0x52,0x53,0x11,0x0D,0x0A,0x0A,  /* 00000348    "_CRS...." */
   4.125 -    0x47,0x01,0x61,0x00,0x61,0x00,0x00,0x01,  /* 00000350    "G.a.a..." */
   4.126 -    0x79,0x00,0x5B,0x82,0x31,0x50,0x53,0x32,  /* 00000358    "y.[.1PS2" */
   4.127 -    0x4D,0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,  /* 00000360    "M._HID.A" */
   4.128 -    0xD0,0x0F,0x13,0x08,0x5F,0x43,0x49,0x44,  /* 00000368    "...._CID" */
   4.129 -    0x0C,0x41,0xD0,0x0F,0x13,0x14,0x09,0x5F,  /* 00000370    ".A....._" */
   4.130 -    0x53,0x54,0x41,0x00,0xA4,0x0A,0x0F,0x08,  /* 00000378    "STA....." */
   4.131 -    0x5F,0x43,0x52,0x53,0x11,0x08,0x0A,0x05,  /* 00000380    "_CRS...." */
   4.132 -    0x22,0x00,0x10,0x79,0x00,0x5B,0x82,0x42,  /* 00000388    ""..y.[.B" */
   4.133 -    0x04,0x50,0x53,0x32,0x4B,0x08,0x5F,0x48,  /* 00000390    ".PS2K._H" */
   4.134 -    0x49,0x44,0x0C,0x41,0xD0,0x03,0x03,0x08,  /* 00000398    "ID.A...." */
   4.135 -    0x5F,0x43,0x49,0x44,0x0C,0x41,0xD0,0x03,  /* 000003A0    "_CID.A.." */
   4.136 -    0x0B,0x14,0x09,0x5F,0x53,0x54,0x41,0x00,  /* 000003A8    "..._STA." */
   4.137 -    0xA4,0x0A,0x0F,0x08,0x5F,0x43,0x52,0x53,  /* 000003B0    "...._CRS" */
   4.138 -    0x11,0x18,0x0A,0x15,0x47,0x01,0x60,0x00,  /* 000003B8    "....G.`." */
   4.139 -    0x60,0x00,0x00,0x01,0x47,0x01,0x64,0x00,  /* 000003C0    "`...G.d." */
   4.140 -    0x64,0x00,0x00,0x01,0x22,0x02,0x00,0x79,  /* 000003C8    "d..."..y" */
   4.141 -    0x00,0x5B,0x82,0x3A,0x46,0x44,0x43,0x30,  /* 000003D0    ".[.:FDC0" */
   4.142 -    0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,  /* 000003D8    "._HID.A." */
   4.143 -    0x07,0x00,0x14,0x09,0x5F,0x53,0x54,0x41,  /* 000003E0    "...._STA" */
   4.144 -    0x00,0xA4,0x0A,0x0F,0x08,0x5F,0x43,0x52,  /* 000003E8    "....._CR" */
   4.145 -    0x53,0x11,0x1B,0x0A,0x18,0x47,0x01,0xF0,  /* 000003F0    "S....G.." */
   4.146 -    0x03,0xF0,0x03,0x01,0x06,0x47,0x01,0xF7,  /* 000003F8    ".....G.." */
   4.147 -    0x03,0xF7,0x03,0x01,0x01,0x22,0x40,0x00,  /* 00000400    "....."@." */
   4.148 -    0x2A,0x04,0x00,0x79,0x00,0x5B,0x82,0x35,  /* 00000408    "*..y.[.5" */
   4.149 -    0x55,0x41,0x52,0x31,0x08,0x5F,0x48,0x49,  /* 00000410    "UAR1._HI" */
   4.150 -    0x44,0x0C,0x41,0xD0,0x05,0x01,0x08,0x5F,  /* 00000418    "D.A...._" */
   4.151 -    0x55,0x49,0x44,0x01,0x14,0x09,0x5F,0x53,  /* 00000420    "UID..._S" */
   4.152 -    0x54,0x41,0x00,0xA4,0x0A,0x0F,0x08,0x5F,  /* 00000428    "TA....._" */
   4.153 -    0x43,0x52,0x53,0x11,0x10,0x0A,0x0D,0x47,  /* 00000430    "CRS....G" */
   4.154 -    0x01,0xF8,0x03,0xF8,0x03,0x01,0x08,0x22,  /* 00000438    "......."" */
   4.155 -    0x10,0x00,0x79,0x00,0x5B,0x82,0x36,0x55,  /* 00000440    "..y.[.6U" */
   4.156 -    0x41,0x52,0x32,0x08,0x5F,0x48,0x49,0x44,  /* 00000448    "AR2._HID" */
   4.157 -    0x0C,0x41,0xD0,0x05,0x01,0x08,0x5F,0x55,  /* 00000450    ".A...._U" */
   4.158 -    0x49,0x44,0x0A,0x02,0x14,0x09,0x5F,0x53,  /* 00000458    "ID...._S" */
   4.159 -    0x54,0x41,0x00,0xA4,0x0A,0x0F,0x08,0x5F,  /* 00000460    "TA....._" */
   4.160 -    0x43,0x52,0x53,0x11,0x10,0x0A,0x0D,0x47,  /* 00000468    "CRS....G" */
   4.161 -    0x01,0xF8,0x02,0xF8,0x02,0x01,0x08,0x22,  /* 00000470    "......."" */
   4.162 -    0x08,0x00,0x79,0x00,
   4.163 +    0x00,0x00,0x00,0x10,0x4D,0x41,0x5F,0x53,  /* 00000090    "....MA_S" */
   4.164 +    0x42,0x5F,0x5B,0x82,0x45,0x41,0x50,0x43,  /* 00000098    "B_[.EAPC" */
   4.165 +    0x49,0x30,0x08,0x5F,0x48,0x49,0x44,0x0C,  /* 000000A0    "I0._HID." */
   4.166 +    0x41,0xD0,0x0A,0x03,0x08,0x5F,0x55,0x49,  /* 000000A8    "A...._UI" */
   4.167 +    0x44,0x00,0x08,0x5F,0x41,0x44,0x52,0x00,  /* 000000B0    "D.._ADR." */
   4.168 +    0x08,0x5F,0x42,0x42,0x4E,0x00,0x14,0x48,  /* 000000B8    "._BBN..H" */
   4.169 +    0x0D,0x5F,0x43,0x52,0x53,0x00,0x08,0x50,  /* 000000C0    "._CRS..P" */
   4.170 +    0x52,0x54,0x30,0x11,0x46,0x0C,0x0A,0xC2,  /* 000000C8    "RT0.F..." */
   4.171 +    0x88,0x0D,0x00,0x02,0x0F,0x00,0x00,0x00,  /* 000000D0    "........" */
   4.172 +    0x00,0x00,0xFF,0x00,0x00,0x00,0x00,0x01,  /* 000000D8    "........" */
   4.173 +    0x47,0x01,0xF8,0x0C,0xF8,0x0C,0x01,0x08,  /* 000000E0    "G......." */
   4.174 +    0x88,0x0D,0x00,0x01,0x0C,0x03,0x00,0x00,  /* 000000E8    "........" */
   4.175 +    0x00,0x00,0xF7,0x0C,0x00,0x00,0xF8,0x0C,  /* 000000F0    "........" */
   4.176 +    0x88,0x0D,0x00,0x01,0x0C,0x03,0x00,0x00,  /* 000000F8    "........" */
   4.177 +    0x00,0x0D,0xFF,0x0F,0x00,0x00,0x00,0x03,  /* 00000100    "........" */
   4.178 +    0x88,0x0D,0x00,0x01,0x0D,0x03,0x00,0x00,  /* 00000108    "........" */
   4.179 +    0x00,0xC0,0x1F,0xC0,0x00,0x00,0x20,0x00,  /* 00000110    "...... ." */
   4.180 +    0x88,0x0D,0x00,0x01,0x0D,0x03,0x00,0x00,  /* 00000118    "........" */
   4.181 +    0x20,0xC0,0x3F,0xC0,0x00,0x00,0x10,0x00,  /* 00000120    " .?....." */
   4.182 +    0x87,0x17,0x00,0x00,0x0C,0x02,0x00,0x00,  /* 00000128    "........" */
   4.183 +    0x00,0x00,0x00,0x00,0x0C,0x00,0xFF,0xFF,  /* 00000130    "........" */
   4.184 +    0x0F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00000138    "........" */
   4.185 +    0x03,0x00,0x87,0x17,0x00,0x00,0x0D,0x03,  /* 00000140    "........" */
   4.186 +    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xF0,  /* 00000148    "........" */
   4.187 +    0xFF,0xFF,0xFF,0xF1,0x00,0x00,0x00,0x00,  /* 00000150    "........" */
   4.188 +    0x00,0x00,0x00,0x02,0x87,0x17,0x00,0x00,  /* 00000158    "........" */
   4.189 +    0x0D,0x03,0x00,0x00,0x00,0x00,0x00,0x00,  /* 00000160    "........" */
   4.190 +    0x00,0xF2,0xFF,0x0F,0x00,0xF2,0x00,0x00,  /* 00000168    "........" */
   4.191 +    0x00,0x00,0x00,0x10,0x00,0x00,0x87,0x17,  /* 00000170    "........" */
   4.192 +    0x00,0x00,0x0D,0x03,0x00,0x00,0x00,0x00,  /* 00000178    "........" */
   4.193 +    0x00,0x10,0x00,0xF2,0x1F,0x10,0x00,0xF2,  /* 00000180    "........" */
   4.194 +    0x00,0x00,0x00,0x00,0x20,0x00,0x00,0x00,  /* 00000188    ".... ..." */
   4.195 +    0x79,0x00,0xA4,0x50,0x52,0x54,0x30,0x5B,  /* 00000190    "y..PRT0[" */
   4.196 +    0x82,0x48,0x31,0x49,0x53,0x41,0x5F,0x08,  /* 00000198    ".H1ISA_." */
   4.197 +    0x5F,0x41,0x44,0x52,0x00,0x5B,0x80,0x50,  /* 000001A0    "_ADR.[.P" */
   4.198 +    0x49,0x52,0x51,0x02,0x0A,0x60,0x0A,0x04,  /* 000001A8    "IRQ..`.." */
   4.199 +    0x10,0x2E,0x5C,0x00,0x5B,0x81,0x29,0x5C,  /* 000001B0    "..\.[.)\" */
   4.200 +    0x2F,0x04,0x5F,0x53,0x42,0x5F,0x50,0x43,  /* 000001B8    "/._SB_PC" */
   4.201 +    0x49,0x30,0x49,0x53,0x41,0x5F,0x50,0x49,  /* 000001C0    "I0ISA_PI" */
   4.202 +    0x52,0x51,0x01,0x50,0x49,0x52,0x41,0x08,  /* 000001C8    "RQ.PIRA." */
   4.203 +    0x50,0x49,0x52,0x42,0x08,0x50,0x49,0x52,  /* 000001D0    "PIRB.PIR" */
   4.204 +    0x43,0x08,0x50,0x49,0x52,0x44,0x08,0x5B,  /* 000001D8    "C.PIRD.[" */
   4.205 +    0x82,0x46,0x0B,0x53,0x59,0x53,0x52,0x08,  /* 000001E0    ".F.SYSR." */
   4.206 +    0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,0x0C,  /* 000001E8    "_HID.A.." */
   4.207 +    0x02,0x08,0x5F,0x55,0x49,0x44,0x01,0x08,  /* 000001F0    ".._UID.." */
   4.208 +    0x43,0x52,0x53,0x5F,0x11,0x4E,0x08,0x0A,  /* 000001F8    "CRS_.N.." */
   4.209 +    0x8A,0x47,0x01,0x10,0x00,0x10,0x00,0x00,  /* 00000200    ".G......" */
   4.210 +    0x10,0x47,0x01,0x22,0x00,0x22,0x00,0x00,  /* 00000208    ".G.".".." */
   4.211 +    0x0C,0x47,0x01,0x30,0x00,0x30,0x00,0x00,  /* 00000210    ".G.0.0.." */
   4.212 +    0x10,0x47,0x01,0x44,0x00,0x44,0x00,0x00,  /* 00000218    ".G.D.D.." */
   4.213 +    0x1C,0x47,0x01,0x62,0x00,0x62,0x00,0x00,  /* 00000220    ".G.b.b.." */
   4.214 +    0x02,0x47,0x01,0x65,0x00,0x65,0x00,0x00,  /* 00000228    ".G.e.e.." */
   4.215 +    0x0B,0x47,0x01,0x72,0x00,0x72,0x00,0x00,  /* 00000230    ".G.r.r.." */
   4.216 +    0x0E,0x47,0x01,0x80,0x00,0x80,0x00,0x00,  /* 00000238    ".G......" */
   4.217 +    0x01,0x47,0x01,0x84,0x00,0x84,0x00,0x00,  /* 00000240    ".G......" */
   4.218 +    0x03,0x47,0x01,0x88,0x00,0x88,0x00,0x00,  /* 00000248    ".G......" */
   4.219 +    0x01,0x47,0x01,0x8C,0x00,0x8C,0x00,0x00,  /* 00000250    ".G......" */
   4.220 +    0x03,0x47,0x01,0x90,0x00,0x90,0x00,0x00,  /* 00000258    ".G......" */
   4.221 +    0x10,0x47,0x01,0xA2,0x00,0xA2,0x00,0x00,  /* 00000260    ".G......" */
   4.222 +    0x1C,0x47,0x01,0xE0,0x00,0xE0,0x00,0x00,  /* 00000268    ".G......" */
   4.223 +    0x10,0x47,0x01,0xA0,0x08,0xA0,0x08,0x00,  /* 00000270    ".G......" */
   4.224 +    0x04,0x47,0x01,0xC0,0x0C,0xC0,0x0C,0x00,  /* 00000278    ".G......" */
   4.225 +    0x10,0x47,0x01,0xD0,0x04,0xD0,0x04,0x00,  /* 00000280    ".G......" */
   4.226 +    0x02,0x79,0x00,0x14,0x0B,0x5F,0x43,0x52,  /* 00000288    ".y..._CR" */
   4.227 +    0x53,0x00,0xA4,0x43,0x52,0x53,0x5F,0x5B,  /* 00000290    "S..CRS_[" */
   4.228 +    0x82,0x2B,0x50,0x49,0x43,0x5F,0x08,0x5F,  /* 00000298    ".+PIC_._" */
   4.229 +    0x48,0x49,0x44,0x0B,0x41,0xD0,0x08,0x5F,  /* 000002A0    "HID.A.._" */
   4.230 +    0x43,0x52,0x53,0x11,0x18,0x0A,0x15,0x47,  /* 000002A8    "CRS....G" */
   4.231 +    0x01,0x20,0x00,0x20,0x00,0x01,0x02,0x47,  /* 000002B0    ". . ...G" */
   4.232 +    0x01,0xA0,0x00,0xA0,0x00,0x01,0x02,0x22,  /* 000002B8    "......."" */
   4.233 +    0x04,0x00,0x79,0x00,0x5B,0x82,0x47,0x05,  /* 000002C0    "..y.[.G." */
   4.234 +    0x44,0x4D,0x41,0x30,0x08,0x5F,0x48,0x49,  /* 000002C8    "DMA0._HI" */
   4.235 +    0x44,0x0C,0x41,0xD0,0x02,0x00,0x08,0x5F,  /* 000002D0    "D.A...._" */
   4.236 +    0x43,0x52,0x53,0x11,0x41,0x04,0x0A,0x3D,  /* 000002D8    "CRS.A..=" */
   4.237 +    0x2A,0x10,0x04,0x47,0x01,0x00,0x00,0x00,  /* 000002E0    "*..G...." */
   4.238 +    0x00,0x00,0x10,0x47,0x01,0x81,0x00,0x81,  /* 000002E8    "...G...." */
   4.239 +    0x00,0x00,0x03,0x47,0x01,0x87,0x00,0x87,  /* 000002F0    "...G...." */
   4.240 +    0x00,0x00,0x01,0x47,0x01,0x89,0x00,0x89,  /* 000002F8    "...G...." */
   4.241 +    0x00,0x00,0x03,0x47,0x01,0x8F,0x00,0x8F,  /* 00000300    "...G...." */
   4.242 +    0x00,0x00,0x01,0x47,0x01,0xC0,0x00,0xC0,  /* 00000308    "...G...." */
   4.243 +    0x00,0x00,0x20,0x47,0x01,0x80,0x04,0x80,  /* 00000310    ".. G...." */
   4.244 +    0x04,0x00,0x10,0x79,0x00,0x5B,0x82,0x25,  /* 00000318    "...y.[.%" */
   4.245 +    0x54,0x4D,0x52,0x5F,0x08,0x5F,0x48,0x49,  /* 00000320    "TMR_._HI" */
   4.246 +    0x44,0x0C,0x41,0xD0,0x01,0x00,0x08,0x5F,  /* 00000328    "D.A...._" */
   4.247 +    0x43,0x52,0x53,0x11,0x10,0x0A,0x0D,0x47,  /* 00000330    "CRS....G" */
   4.248 +    0x01,0x40,0x00,0x40,0x00,0x00,0x04,0x22,  /* 00000338    ".@.@..."" */
   4.249 +    0x01,0x00,0x79,0x00,0x5B,0x82,0x25,0x52,  /* 00000340    "..y.[.%R" */
   4.250 +    0x54,0x43,0x5F,0x08,0x5F,0x48,0x49,0x44,  /* 00000348    "TC_._HID" */
   4.251 +    0x0C,0x41,0xD0,0x0B,0x00,0x08,0x5F,0x43,  /* 00000350    ".A...._C" */
   4.252 +    0x52,0x53,0x11,0x10,0x0A,0x0D,0x47,0x01,  /* 00000358    "RS....G." */
   4.253 +    0x70,0x00,0x70,0x00,0x00,0x02,0x22,0x00,  /* 00000360    "p.p..."." */
   4.254 +    0x01,0x79,0x00,0x5B,0x82,0x22,0x53,0x50,  /* 00000368    ".y.[."SP" */
   4.255 +    0x4B,0x52,0x08,0x5F,0x48,0x49,0x44,0x0C,  /* 00000370    "KR._HID." */
   4.256 +    0x41,0xD0,0x08,0x00,0x08,0x5F,0x43,0x52,  /* 00000378    "A...._CR" */
   4.257 +    0x53,0x11,0x0D,0x0A,0x0A,0x47,0x01,0x61,  /* 00000380    "S....G.a" */
   4.258 +    0x00,0x61,0x00,0x00,0x01,0x79,0x00,0x5B,  /* 00000388    ".a...y.[" */
   4.259 +    0x82,0x31,0x50,0x53,0x32,0x4D,0x08,0x5F,  /* 00000390    ".1PS2M._" */
   4.260 +    0x48,0x49,0x44,0x0C,0x41,0xD0,0x0F,0x13,  /* 00000398    "HID.A..." */
   4.261 +    0x08,0x5F,0x43,0x49,0x44,0x0C,0x41,0xD0,  /* 000003A0    "._CID.A." */
   4.262 +    0x0F,0x13,0x14,0x09,0x5F,0x53,0x54,0x41,  /* 000003A8    "...._STA" */
   4.263 +    0x00,0xA4,0x0A,0x0F,0x08,0x5F,0x43,0x52,  /* 000003B0    "....._CR" */
   4.264 +    0x53,0x11,0x08,0x0A,0x05,0x22,0x00,0x10,  /* 000003B8    "S....".." */
   4.265 +    0x79,0x00,0x5B,0x82,0x42,0x04,0x50,0x53,  /* 000003C0    "y.[.B.PS" */
   4.266 +    0x32,0x4B,0x08,0x5F,0x48,0x49,0x44,0x0C,  /* 000003C8    "2K._HID." */
   4.267 +    0x41,0xD0,0x03,0x03,0x08,0x5F,0x43,0x49,  /* 000003D0    "A...._CI" */
   4.268 +    0x44,0x0C,0x41,0xD0,0x03,0x0B,0x14,0x09,  /* 000003D8    "D.A....." */
   4.269 +    0x5F,0x53,0x54,0x41,0x00,0xA4,0x0A,0x0F,  /* 000003E0    "_STA...." */
   4.270 +    0x08,0x5F,0x43,0x52,0x53,0x11,0x18,0x0A,  /* 000003E8    "._CRS..." */
   4.271 +    0x15,0x47,0x01,0x60,0x00,0x60,0x00,0x00,  /* 000003F0    ".G.`.`.." */
   4.272 +    0x01,0x47,0x01,0x64,0x00,0x64,0x00,0x00,  /* 000003F8    ".G.d.d.." */
   4.273 +    0x01,0x22,0x02,0x00,0x79,0x00,0x5B,0x82,  /* 00000400    "."..y.[." */
   4.274 +    0x3A,0x46,0x44,0x43,0x30,0x08,0x5F,0x48,  /* 00000408    ":FDC0._H" */
   4.275 +    0x49,0x44,0x0C,0x41,0xD0,0x07,0x00,0x14,  /* 00000410    "ID.A...." */
   4.276 +    0x09,0x5F,0x53,0x54,0x41,0x00,0xA4,0x0A,  /* 00000418    "._STA..." */
   4.277 +    0x0F,0x08,0x5F,0x43,0x52,0x53,0x11,0x1B,  /* 00000420    ".._CRS.." */
   4.278 +    0x0A,0x18,0x47,0x01,0xF0,0x03,0xF0,0x03,  /* 00000428    "..G....." */
   4.279 +    0x01,0x06,0x47,0x01,0xF7,0x03,0xF7,0x03,  /* 00000430    "..G....." */
   4.280 +    0x01,0x01,0x22,0x40,0x00,0x2A,0x04,0x00,  /* 00000438    ".."@.*.." */
   4.281 +    0x79,0x00,0x5B,0x82,0x35,0x55,0x41,0x52,  /* 00000440    "y.[.5UAR" */
   4.282 +    0x31,0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,  /* 00000448    "1._HID.A" */
   4.283 +    0xD0,0x05,0x01,0x08,0x5F,0x55,0x49,0x44,  /* 00000450    "...._UID" */
   4.284 +    0x01,0x14,0x09,0x5F,0x53,0x54,0x41,0x00,  /* 00000458    "..._STA." */
   4.285 +    0xA4,0x0A,0x0F,0x08,0x5F,0x43,0x52,0x53,  /* 00000460    "...._CRS" */
   4.286 +    0x11,0x10,0x0A,0x0D,0x47,0x01,0xF8,0x03,  /* 00000468    "....G..." */
   4.287 +    0xF8,0x03,0x01,0x08,0x22,0x10,0x00,0x79,  /* 00000470    "...."..y" */
   4.288 +    0x00,0x5B,0x82,0x36,0x55,0x41,0x52,0x32,  /* 00000478    ".[.6UAR2" */
   4.289 +    0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,  /* 00000480    "._HID.A." */
   4.290 +    0x05,0x01,0x08,0x5F,0x55,0x49,0x44,0x0A,  /* 00000488    "..._UID." */
   4.291 +    0x02,0x14,0x09,0x5F,0x53,0x54,0x41,0x00,  /* 00000490    "..._STA." */
   4.292 +    0xA4,0x0A,0x0F,0x08,0x5F,0x43,0x52,0x53,  /* 00000498    "...._CRS" */
   4.293 +    0x11,0x10,0x0A,0x0D,0x47,0x01,0xF8,0x02,  /* 000004A0    "....G..." */
   4.294 +    0xF8,0x02,0x01,0x08,0x22,0x08,0x00,0x79,  /* 000004A8    "...."..y" */
   4.295 +    0x00,
   4.296  };
   4.297  int DsdtLen=sizeof(AmlCode);
     5.1 --- a/tools/firmware/acpi/acpi_fadt.h	Sat Jun 17 08:56:02 2006 +0100
     5.2 +++ b/tools/firmware/acpi/acpi_fadt.h	Sat Jun 17 09:00:16 2006 +0100
     5.3 @@ -22,19 +22,19 @@
     5.4  // FADT Definitions, see ACPI 2.0 specification for details.
     5.5  //
     5.6  
     5.7 -#define ACPI_OEM_FADT_REVISION  0x00000000 // TBD
     5.8 +#define ACPI_OEM_FADT_REVISION  0x00000001 // TBD
     5.9  
    5.10 -#define ACPI_PREFERRED_PM_PROFILE 0x04
    5.11 +#define ACPI_PREFERRED_PM_PROFILE 0x00
    5.12  #define ACPI_SCI_INT              0x0009
    5.13 -#define ACPI_SMI_CMD              0x000000B2
    5.14 +#define ACPI_SMI_CMD              0x00000000
    5.15  #define ACPI_ACPI_ENABLE    0x00
    5.16  #define ACPI_ACPI_DISABLE   0x00
    5.17  #define ACPI_S4_BIOS_REQ    0x00
    5.18  #define ACPI_PSTATE_CNT     0x00
    5.19 -#define ACPI_GPE1_BASE      0x20
    5.20 +#define ACPI_GPE1_BASE      0x00
    5.21  #define ACPI_CST_CNT        0x00
    5.22 -#define ACPI_P_LVL2_LAT     0x0065
    5.23 -#define ACPI_P_LVL3_LAT     0X03E9
    5.24 +#define ACPI_P_LVL2_LAT     0x0064
    5.25 +#define ACPI_P_LVL3_LAT     0X03E8
    5.26  #define ACPI_FLUSH_SIZE     0x00
    5.27  #define ACPI_FLUSH_STRIDE   0x00
    5.28  #define ACPI_DUTY_OFFSET    0x01
    5.29 @@ -51,15 +51,16 @@
    5.30  //
    5.31  // Fixed Feature Flags
    5.32  // 
    5.33 -#define ACPI_FIXED_FEATURE_FLAGS (ACPI_SLP_BUTTON| ACPI_WBINVD  )
    5.34 +#define ACPI_FIXED_FEATURE_FLAGS (ACPI_PROC_C1|ACPI_SLP_BUTTON|ACPI_WBINVD|ACPI_PWR_BUTTON|ACPI_FIX_RTC)
    5.35  
    5.36  //
    5.37  // PM1A Event Register Block Generic Address Information
    5.38  //
    5.39  #define ACPI_PM1A_EVT_BLK_ADDRESS_SPACE_ID  ACPI_SYSTEM_IO
    5.40 -#define ACPI_PM1A_EVT_BLK_BIT_WIDTH         0x00
    5.41 +#define ACPI_PM1A_EVT_BLK_BIT_WIDTH         0x20
    5.42  #define ACPI_PM1A_EVT_BLK_BIT_OFFSET        0x00
    5.43 -#define ACPI_PM1A_EVT_BLK_ADDRESS           0x0000000000008000
    5.44 +//#define ACPI_PM1A_EVT_BLK_ADDRESS           0x000000000000c010
    5.45 +#define ACPI_PM1A_EVT_BLK_ADDRESS           0x000000000000c040
    5.46  
    5.47  //
    5.48  // PM1B Event Register Block Generic Address Information
    5.49 @@ -73,7 +74,7 @@
    5.50  // PM1A Control Register Block Generic Address Information
    5.51  //
    5.52  #define ACPI_PM1A_CNT_BLK_ADDRESS_SPACE_ID  ACPI_SYSTEM_IO
    5.53 -#define ACPI_PM1A_CNT_BLK_BIT_WIDTH         0x08
    5.54 +#define ACPI_PM1A_CNT_BLK_BIT_WIDTH         0x10
    5.55  #define ACPI_PM1A_CNT_BLK_BIT_OFFSET        0x00
    5.56  #define ACPI_PM1A_CNT_BLK_ADDRESS           (ACPI_PM1A_EVT_BLK_ADDRESS + 0x04)
    5.57  
     6.1 --- a/tools/ioemu/hw/pc.c	Sat Jun 17 08:56:02 2006 +0100
     6.2 +++ b/tools/ioemu/hw/pc.c	Sat Jun 17 09:00:16 2006 +0100
     6.3 @@ -375,7 +375,9 @@ static int ne2000_irq[NE2000_NB_MAX] = {
     6.4  static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
     6.5  static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
     6.6  
     6.7 -extern int acpi_init(unsigned int base);
     6.8 +//extern int acpi_init(unsigned int base);
     6.9 +/*  PIIX4 acpi pci configuration space, func 3 */
    6.10 +extern void pci_piix4_acpi_init(PCIBus *bus);
    6.11  
    6.12  #define NOBIOS 1
    6.13  
    6.14 @@ -583,7 +585,9 @@ void pc_init(uint64_t ram_size, int vga_
    6.15      floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);
    6.16  
    6.17      cmos_init(ram_size, boot_device, bs_table, timeoffset);
    6.18 -    acpi_init(0x8000);
    6.19 +// using PIIX4 acpi model
    6.20 +//    acpi_init(0x8000);
    6.21 +    pci_piix4_acpi_init(pci_bus);
    6.22  
    6.23      if (pci_enabled && usb_enabled) {
    6.24  	usb_uhci_init(pci_bus, usb_root_ports);
     7.1 --- a/tools/ioemu/hw/pci.c	Sat Jun 17 08:56:02 2006 +0100
     7.2 +++ b/tools/ioemu/hw/pci.c	Sat Jun 17 09:00:16 2006 +0100
     7.3 @@ -1394,7 +1394,7 @@ static uint32_t pci_config_readb(PCIDevi
     7.4  static uint32_t pci_bios_io_addr;
     7.5  static uint32_t pci_bios_mem_addr;
     7.6  /* host irqs corresponding to PCI irqs A-D */
     7.7 -static uint8_t pci_irqs[4] = { 11, 9, 11, 9 };
     7.8 +static uint8_t pci_irqs[4] = { 10, 11, 10, 11 };
     7.9  
    7.10  static void pci_set_io_region_addr(PCIDevice *d, int region_num, uint32_t addr)
    7.11  {
    7.12 @@ -1447,12 +1447,22 @@ static void pci_bios_init_device(PCIDevi
    7.13              pci_set_io_region_addr(d, 3, 0x374);
    7.14          }
    7.15          break;
    7.16 +       case 0x0680:
    7.17 +       if (vendor_id == 0x8086 && device_id == 0x7113) {
    7.18 +          // PIIX4 ACPI PM 
    7.19 +        pci_config_writew(d, 0x20, 0x0000); // NO smb bus IO enable in PIIX4
    7.20 +        pci_config_writew(d, 0x22, 0x0000); 
    7.21 +        goto default_map;
    7.22 + 	}
    7.23 +         break;
    7.24 +
    7.25      case 0x0300:
    7.26          if (vendor_id != 0x1234)
    7.27              goto default_map;
    7.28          /* VGA: map frame buffer to default Bochs VBE address */
    7.29          pci_set_io_region_addr(d, 0, 0xE0000000);
    7.30          break;
    7.31 +
    7.32      case 0x0800:
    7.33          /* PIC */
    7.34          vendor_id = pci_config_readw(d, PCI_VENDOR_ID);
    7.35 @@ -1497,6 +1507,13 @@ static void pci_bios_init_device(PCIDevi
    7.36          pic_irq = pci_irqs[pin];
    7.37          pci_config_writeb(d, PCI_INTERRUPT_LINE, pic_irq);
    7.38      }
    7.39 +    if (class== 0x0680&& vendor_id == 0x8086 && device_id == 0x7113) {
    7.40 +         // PIIX4 ACPI PM
    7.41 +       pci_config_writew(d, 0x20, 0x0000); // NO smb bus IO enable in PIIX4
    7.42 +       pci_config_writew(d, 0x22, 0x0000);
    7.43 +       pci_config_writew(d, 0x3c, 0x0009); // Hardcodeed IRQ9
    7.44 +       pci_config_writew(d, 0x3d, 0x0001);
    7.45 +    }
    7.46  }
    7.47  
    7.48  /*
     8.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     8.2 +++ b/tools/ioemu/hw/piix4acpi.c	Sat Jun 17 09:00:16 2006 +0100
     8.3 @@ -0,0 +1,389 @@
     8.4 +/*
     8.5 + * PIIX4 ACPI controller emulation
     8.6 + * 
     8.7 + * Winston liwen Wang, winston.l.wang@intel.com
     8.8 + * Copyright (c) 2006 , Intel Corporation.
     8.9 + * 
    8.10 + * Permission is hereby granted, free of charge, to any person obtaining a copy
    8.11 + * of this software and associated documentation files (the "Software"), to deal
    8.12 + * in the Software without restriction, including without limitation the rights
    8.13 + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
    8.14 + * copies of the Software, and to permit persons to whom the Software is
    8.15 + * furnished to do so, subject to the following conditions:
    8.16 + *
    8.17 + * The above copyright notice and this permission notice shall be included in
    8.18 + * all copies or substantial portions of the Software.
    8.19 + *
    8.20 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
    8.21 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
    8.22 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
    8.23 + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
    8.24 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
    8.25 + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
    8.26 + * THE SOFTWARE.
    8.27 + */
    8.28 +#include "vl.h"
    8.29 +#define FREQUENCE_PMTIMER  3753425
    8.30 +/* acpi register bit define here  */
    8.31 +
    8.32 +/* PM1_STS 						*/
    8.33 +#define TMROF_STS 	  (1 << 0)
    8.34 +#define BM_STS 	  	  (1 << 4)
    8.35 +#define GBL_STS 	  (1 << 5)
    8.36 +#define PWRBTN_STS 	  (1 << 8)
    8.37 +#define RTC_STS 	  (1 << 10)
    8.38 +#define PRBTNOR_STS       (1 << 11)
    8.39 +#define WAK_STS 	  (1 << 15)
    8.40 +/* PM1_EN						*/
    8.41 +#define TMROF_EN          (1 << 0)
    8.42 +#define GBL_EN            (1 << 5)
    8.43 +#define PWRBTN_EN         (1 << 8)
    8.44 +#define RTC_EN   	  (1 << 10)
    8.45 +/* PM1_CNT						*/
    8.46 +#define SCI_EN            (1 << 0)
    8.47 +#define GBL_RLS           (1 << 2)
    8.48 +#define SLP_EN   	  (1 << 13)
    8.49 +
    8.50 +typedef struct AcpiDeviceState AcpiDeviceState;
    8.51 +AcpiDeviceState *acpi_device_table;
    8.52 +
    8.53 +/* Bits of PM1a register define here  */											
    8.54 +typedef struct PM1Event_BLK {
    8.55 +    uint16_t pm1_status; /* pm1a_EVT_BLK */
    8.56 +    uint16_t pm1_enable; /* pm1a_EVT_BLK+2 */
    8.57 +}PM1Event_BLK;
    8.58 +
    8.59 +typedef struct PCIAcpiState {
    8.60 +    PCIDevice dev;
    8.61 +    uint16_t irq;	
    8.62 +    uint16_t pm1_status; /* pm1a_EVT_BLK */
    8.63 +    uint16_t pm1_enable; /* pm1a_EVT_BLK+2 */
    8.64 +    uint16_t pm1_control; /* pm1a_ECNT_BLK */
    8.65 +    uint32_t pm1_timer; /* pmtmr_BLK */
    8.66 +} PCIAcpiState;
    8.67 +
    8.68 +static PCIAcpiState *acpi_state;
    8.69 +
    8.70 +static inline void acpi_set_irq(PCIAcpiState *s)
    8.71 +{
    8.72 +
    8.73 +/* no real SCI event need for now, so comment the following line out */
    8.74 +/*        pic_set_irq(s->irq, 1);	*/
    8.75 +         printf("acpi_set_irq: s->irq %x \n",s->irq);
    8.76 +}
    8.77 +
    8.78 +static void acpi_reset(PCIAcpiState *s)
    8.79 +{
    8.80 +    uint8_t *pci_conf;	
    8.81 +    pci_conf = s->dev.config;
    8.82 +
    8.83 +    pci_conf[0x42] = 0x00;     
    8.84 +    pci_conf[0x43] = 0x00;	
    8.85 +    s->irq = 9; 
    8.86 +    s->pm1_status = 0; 
    8.87 +    s->pm1_enable = 0x00;   /*TMROF_EN	  should cleared */
    8.88 +    s->pm1_control = SCI_EN;/*SCI_EN */
    8.89 +    s->pm1_timer = 0;
    8.90 +}
    8.91 +
    8.92 +/*byte access  */
    8.93 +static void acpiPm1Status_writeb(void *opaque, uint32_t addr, uint32_t val)
    8.94 +{
    8.95 +    PCIAcpiState *s = opaque;
    8.96 +    if ((val&TMROF_STS)==TMROF_STS)
    8.97 +    s->pm1_status = s->pm1_status&!TMROF_STS;
    8.98 +     
    8.99 +    if ((val&GBL_STS)==GBL_STS)
   8.100 +    s->pm1_status = s->pm1_status&!GBL_STS;     
   8.101 +    
   8.102 +/*     printf("acpiPm1Status_writeb \n addr %x val:%x pm1_status:%x \n", addr, val,s->pm1_status); */
   8.103 +
   8.104 +} 
   8.105 +
   8.106 +static uint32_t acpiPm1Status_readb(void *opaque, uint32_t addr)
   8.107 +{
   8.108 +    PCIAcpiState *s = opaque;
   8.109 +    uint32_t val;
   8.110 +
   8.111 +    val = s->pm1_status;  
   8.112 +/*         printf("acpiPm1Status_readb \n addr %x val:%x\n", addr, val); */
   8.113 +	
   8.114 +   return val;
   8.115 +}
   8.116 +
   8.117 +static void acpiPm1StatusP1_writeb(void *opaque, uint32_t addr, uint32_t val)
   8.118 +{
   8.119 +    PCIAcpiState *s = opaque;
   8.120 +    
   8.121 +     s->pm1_status = (val<<8)||(s->pm1_status); 
   8.122 +/*     printf("acpiPm1StatusP1_writeb \n addr %x val:%x\n", addr, val); */
   8.123 +
   8.124 +} 
   8.125 +
   8.126 +static uint32_t acpiPm1StatusP1_readb(void *opaque, uint32_t addr)
   8.127 +{
   8.128 +    PCIAcpiState *s = opaque;
   8.129 +    uint32_t val;
   8.130 +
   8.131 +    val = (s->pm1_status)>>8;  
   8.132 +    printf("acpiPm1StatusP1_readb \n addr %x val:%x\n", addr, val);
   8.133 +	
   8.134 +	return val;
   8.135 +}
   8.136 +
   8.137 +static void acpiPm1Enable_writeb(void *opaque, uint32_t addr, uint32_t val)
   8.138 +{
   8.139 +    PCIAcpiState *s = opaque;
   8.140 +    
   8.141 +    s->pm1_enable = val; 
   8.142 +/*   printf("acpiPm1Enable_writeb \n addr %x val:%x\n", addr, val); */
   8.143 +
   8.144 +} 
   8.145 +
   8.146 +static uint32_t acpiPm1Enable_readb(void *opaque, uint32_t addr)
   8.147 +{
   8.148 +    PCIAcpiState *s = opaque;
   8.149 +    uint32_t val;
   8.150 +
   8.151 +    val = (s->pm1_enable)||0x1;  
   8.152 +/*    printf("acpiPm1Enable_readb \n addr %x val:%x\n", addr, val); */
   8.153 +	
   8.154 +    return val;
   8.155 +}
   8.156 +		
   8.157 +static void acpiPm1EnableP1_writeb(void *opaque, uint32_t addr, uint32_t val)
   8.158 +{
   8.159 +    PCIAcpiState *s = opaque;
   8.160 +    
   8.161 +    s->pm1_enable = (val<<8)||(s->pm1_enable); 
   8.162 +/*    printf("acpiPm1EnableP1_writeb \n addr %x val:%x\n", addr, val); */
   8.163 +
   8.164 +} 
   8.165 +
   8.166 +static uint32_t acpiPm1EnableP1_readb(void *opaque, uint32_t addr)
   8.167 +{
   8.168 +    PCIAcpiState *s = opaque;
   8.169 +    uint32_t val;
   8.170 +
   8.171 +    val = (s->pm1_enable)>>8;  
   8.172 +/*  printf("acpiPm1EnableP1_readb \n addr %x val:%x\n", addr, val); */
   8.173 +	
   8.174 +    return val;
   8.175 +}
   8.176 +
   8.177 +static void acpiPm1Control_writeb(void *opaque, uint32_t addr, uint32_t val)
   8.178 +{
   8.179 +    PCIAcpiState *s = opaque;
   8.180 +    
   8.181 +    s->pm1_control = val; 
   8.182 +/*  printf("acpiPm1Control_writeb \n addr %x val:%x\n", addr, val); */
   8.183 +
   8.184 +} 
   8.185 +
   8.186 +static uint32_t acpiPm1Control_readb(void *opaque, uint32_t addr)
   8.187 +{
   8.188 +    PCIAcpiState *s = opaque;
   8.189 +    uint32_t val;
   8.190 +
   8.191 +    val = s->pm1_control;  
   8.192 +/*    printf("acpiPm1Control_readb \n addr %x val:%x\n", addr, val); */
   8.193 +	
   8.194 +    return val;
   8.195 +}
   8.196 +
   8.197 +static void acpiPm1ControlP1_writeb(void *opaque, uint32_t addr, uint32_t val)
   8.198 +{
   8.199 +    PCIAcpiState *s = opaque;
   8.200 +    
   8.201 +    s->pm1_control = (val<<8)||(s->pm1_control); 
   8.202 +/*    printf("acpiPm1ControlP1_writeb \n addr %x val:%x\n", addr, val); */
   8.203 +
   8.204 +} 
   8.205 +
   8.206 +static uint32_t acpiPm1ControlP1_readb(void *opaque, uint32_t addr)
   8.207 +{
   8.208 +    PCIAcpiState *s = opaque;
   8.209 +    uint32_t val;
   8.210 +
   8.211 +    val = (s->pm1_control)>>8;  
   8.212 +/*    printf("acpiPm1ControlP1_readb \n addr %x val:%x\n", addr, val); */
   8.213 +	
   8.214 +    return val;
   8.215 +}
   8.216 +
   8.217 +
   8.218 +/* word access   */
   8.219 +
   8.220 +static void acpiPm1Status_writew(void *opaque, uint32_t addr, uint32_t val)
   8.221 +{
   8.222 +    PCIAcpiState *s = opaque;
   8.223 +    if ((val&TMROF_STS)==TMROF_STS)
   8.224 +    s->pm1_status = s->pm1_status&!TMROF_STS;
   8.225 +     
   8.226 +    if ((val&GBL_STS)==GBL_STS)
   8.227 +    s->pm1_status = s->pm1_status&!GBL_STS;     
   8.228 +    
   8.229 +/*    printf("acpiPm1Status_writew \n addr %x val:%x pm1_status:%x \n", addr, val,s->pm1_status); */
   8.230 +} 
   8.231 +
   8.232 +static uint32_t acpiPm1Status_readw(void *opaque, uint32_t addr)
   8.233 +{
   8.234 +    PCIAcpiState *s = opaque;
   8.235 +    uint32_t val;
   8.236 +
   8.237 +    val = s->pm1_status;  
   8.238 +/*    printf("acpiPm1Status_readw \n addr %x val:%x\n", addr, val); */
   8.239 +	
   8.240 +    return val;
   8.241 +}
   8.242 +
   8.243 +static void acpiPm1Enable_writew(void *opaque, uint32_t addr, uint32_t val)
   8.244 +{
   8.245 +    PCIAcpiState *s = opaque;
   8.246 +    
   8.247 +    s->pm1_enable = val; 
   8.248 +/*    printf("acpiPm1Enable_writew \n addr %x val:%x\n", addr, val); */
   8.249 +
   8.250 +} 
   8.251 +
   8.252 +static uint32_t acpiPm1Enable_readw(void *opaque, uint32_t addr)
   8.253 +{
   8.254 +    PCIAcpiState *s = opaque;
   8.255 +    uint32_t val;
   8.256 +
   8.257 +    val = s->pm1_enable;  
   8.258 +/*    printf("acpiPm1Enable_readw \n addr %x val:%x\n", addr, val); */
   8.259 +	
   8.260 +   return val;
   8.261 +}
   8.262 +
   8.263 +static void acpiPm1Control_writew(void *opaque, uint32_t addr, uint32_t val)
   8.264 +{
   8.265 +    PCIAcpiState *s = opaque;
   8.266 +    
   8.267 +    s->pm1_control = val; 
   8.268 +/*    printf("acpiPm1Control_writew \n addr %x val:%x\n", addr, val); */
   8.269 +
   8.270 +} 
   8.271 +
   8.272 +static uint32_t acpiPm1Control_readw(void *opaque, uint32_t addr)
   8.273 +{
   8.274 +    PCIAcpiState *s = opaque;
   8.275 +    uint32_t val;
   8.276 +
   8.277 +    val = s->pm1_control;  
   8.278 +/*    printf("acpiPm1Control_readw \n addr %x val:%x\n", addr, val);  */
   8.279 +	
   8.280 +    return val;
   8.281 +}
   8.282 +
   8.283 +/* dword access */
   8.284 +															
   8.285 +static void acpiPm1Event_writel(void *opaque, uint32_t addr, uint32_t val)
   8.286 +{
   8.287 +    PCIAcpiState *s = opaque;
   8.288 +    
   8.289 +    s->pm1_status = val; 
   8.290 +    s->pm1_enable = val>>16;
   8.291 +/*     printf("acpiPm1Event_writel \n addr %x val:%x \n", addr, val); */
   8.292 +      
   8.293 +} 
   8.294 +
   8.295 +static void acpiPm1Event_readl(void *opaque, uint32_t addr)
   8.296 +{
   8.297 +    PCIAcpiState *s = opaque;
   8.298 +    uint32_t val;
   8.299 +    
   8.300 +    val=s->pm1_status|(s->pm1_enable<<16);
   8.301 +/*    printf("acpiPm1Event_readl \n addr %x val:%x\n", addr, val);    */
   8.302 +}
   8.303 +
   8.304 +static void acpiPm1Timer_writel(void *opaque, uint32_t addr, uint32_t val)
   8.305 +{
   8.306 +    PCIAcpiState *s = opaque;
   8.307 +    
   8.308 +    s->pm1_timer = val; 
   8.309 +/*    printf("acpiPm1Timer_writel \n addr %x val:%x\n", addr, val); */
   8.310 +
   8.311 +} 
   8.312 +
   8.313 +static uint32_t acpiPm1Timer_readl(void *opaque, uint32_t addr)
   8.314 +{
   8.315 +    PCIAcpiState *s = opaque;
   8.316 +    uint32_t val;
   8.317 +
   8.318 +    val = s->pm1_timer;  
   8.319 +/*    printf("acpiPm1Timer_readl \n addr %x val:%x\n", addr, val); */
   8.320 +    return val;
   8.321 +}
   8.322 +
   8.323 +static void acpi_map(PCIDevice *pci_dev, int region_num, 
   8.324 +                    uint32_t addr, uint32_t size, int type)
   8.325 +{
   8.326 +      PCIAcpiState *d = (PCIAcpiState *)pci_dev;
   8.327 +      printf("register acpi io \n ");
   8.328 +   /*Byte access		*/
   8.329 +       register_ioport_write(addr, 1, 1, acpiPm1Status_writeb, d);
   8.330 +       register_ioport_read(addr, 1, 1, acpiPm1Status_readb, d);
   8.331 +       register_ioport_write(addr+1, 1, 1, acpiPm1StatusP1_writeb, d);
   8.332 +       register_ioport_read(addr+1, 1, 1, acpiPm1StatusP1_readb, d);
   8.333 +
   8.334 +       register_ioport_write(addr + 2, 1, 1, acpiPm1Enable_writeb, d);
   8.335 +       register_ioport_read(addr + 2, 1, 1, acpiPm1Enable_readb, d);
   8.336 +       register_ioport_write(addr + 2 +1, 1, 1, acpiPm1EnableP1_writeb, d);
   8.337 +       register_ioport_read(addr + 2 +1, 1, 1, acpiPm1EnableP1_readb, d);
   8.338 +
   8.339 +       register_ioport_write(addr + 4, 1, 1, acpiPm1Control_writeb, d);
   8.340 +       register_ioport_read(addr + 4, 1, 1, acpiPm1Control_readb, d);
   8.341 +       register_ioport_write(addr + 4 + 1, 1, 1, acpiPm1ControlP1_writeb, d);
   8.342 +       register_ioport_read(addr + 4 +1, 1, 1, acpiPm1ControlP1_readb, d);	
   8.343 +
   8.344 +	/* word access */
   8.345 +        register_ioport_write(addr, 2, 2, acpiPm1Status_writew, d);
   8.346 +        register_ioport_read(addr, 2, 2, acpiPm1Status_readw, d);
   8.347 +
   8.348 +        register_ioport_write(addr + 2, 2, 2, acpiPm1Enable_writew, d);
   8.349 +        register_ioport_read(addr + 2, 2, 2, acpiPm1Enable_readw, d); 
   8.350 +
   8.351 +        register_ioport_write(addr + 4, 2, 2, acpiPm1Control_writew, d);
   8.352 +        register_ioport_read(addr + 4, 2, 2, acpiPm1Control_readw, d);
   8.353 +
   8.354 +   /* dword access */
   8.355 +        register_ioport_write(addr, 4, 4, acpiPm1Event_writel, d);
   8.356 +        register_ioport_read(addr, 4, 4, acpiPm1Event_readl, d);
   8.357 +		
   8.358 +        register_ioport_write(addr + 8, 4, 4, acpiPm1Timer_writel, d);
   8.359 +        register_ioport_read(addr + 8, 4, 4, acpiPm1Timer_readl, d);
   8.360 +}
   8.361 +													
   8.362 +
   8.363 +/*  PIIX4 acpi pci configuration space, func 3 */
   8.364 +void pci_piix4_acpi_init(PCIBus *bus)
   8.365 +{
   8.366 +    PCIAcpiState *d;//,*s;
   8.367 +    uint8_t *pci_conf;//,*pci_conf_usb;
   8.368 +
   8.369 +    /* register a function 3 of PIIX4 */
   8.370 +    d = (PCIAcpiState *)pci_register_device(bus, "PIIX4 ACPI",
   8.371 +                                           sizeof(PCIAcpiState),
   8.372 +                                           ((PCIDevice *)piix3_state)->devfn + 3,
   8.373 +                                           NULL, NULL);
   8.374 +    acpi_state = d;
   8.375 +    pci_conf = d->dev.config;
   8.376 +    pci_conf[0x00] = 0x86; // Intel
   8.377 +    pci_conf[0x01] = 0x80;
   8.378 +    pci_conf[0x02] = 0x13;
   8.379 +    pci_conf[0x03] = 0x71;
   8.380 +    pci_conf[0x08] = 0x01;  //B0 stepping
   8.381 +    pci_conf[0x09] = 0x00;  //base class
   8.382 +    pci_conf[0x0a] = 0x80;  //Sub class
   8.383 +    pci_conf[0x0b] = 0x06;
   8.384 +    pci_conf[0x0e] = 0x00;
   8.385 +    pci_conf[0x3d] = 0x01; // Hardwired to PIRQA is used
   8.386 +								  
   8.387 +    pci_register_io_region((PCIDevice *)d, 4, 0x10, 
   8.388 +                           PCI_ADDRESS_SPACE_IO, acpi_map);
   8.389 +
   8.390 +    acpi_reset (d);  
   8.391 +
   8.392 +}
     9.1 --- a/tools/ioemu/target-i386-dm/Makefile	Sat Jun 17 08:56:02 2006 +0100
     9.2 +++ b/tools/ioemu/target-i386-dm/Makefile	Sat Jun 17 09:00:16 2006 +0100
     9.3 @@ -281,7 +281,7 @@ VL_OBJS+= usb.o usb-hub.o usb-uhci.o usb
     9.4  # Hardware support
     9.5  VL_OBJS+= ide.o ne2000.o pckbd.o vga.o dma.o
     9.6  VL_OBJS+= fdc.o mc146818rtc.o serial.o i8259_stub.o pc.o port-e9.o
     9.7 -VL_OBJS+= cirrus_vga.o pcnet.o acpi.o
     9.8 +VL_OBJS+= cirrus_vga.o pcnet.o piix4acpi.o
     9.9  VL_OBJS+= $(SOUND_HW) $(AUDIODRV) mixeng.o
    9.10  
    9.11  ifeq ($(TARGET_ARCH), ppc)