direct-io.hg

changeset 12963:530597f5387f

[XEN][POWERPC] fix some hard tabs that snuck by
Signed-off-by: Jimi Xenidis <jimix@watson.ibm.com>
Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com>
author Jimi Xenidis <jimix@watson.ibm.com>
date Wed Nov 22 16:29:25 2006 -0500 (2006-11-22)
parents 38b437a708a2
children b5a89f01a440
files xen/arch/powerpc/external.c xen/arch/powerpc/mpic.c xen/arch/powerpc/mpic_init.c xen/arch/powerpc/setup.c xen/arch/powerpc/smp.c
line diff
     1.1 --- a/xen/arch/powerpc/external.c	Wed Nov 22 16:09:28 2006 -0500
     1.2 +++ b/xen/arch/powerpc/external.c	Wed Nov 22 16:29:25 2006 -0500
     1.3 @@ -83,14 +83,14 @@ void do_external(struct cpu_user_regs *r
     1.4      vec = xen_mpic_get_irq(regs);
     1.5  
     1.6      if (vector_is_ipi(vec)) {
     1.7 -	/* do_IRQ is fundamentally broken for reliable IPI delivery.  */
     1.8 -	irq_desc_t *desc = &irq_desc[vec];
     1.9 -	regs->entry_vector = vec;
    1.10 -	spin_lock(&desc->lock);
    1.11 -	desc->handler->ack(vec);
    1.12 -	desc->action->handler(vector_to_irq(vec), desc->action->dev_id, regs);
    1.13 -	desc->handler->end(vec);
    1.14 -	spin_unlock(&desc->lock);
    1.15 +        /* do_IRQ is fundamentally broken for reliable IPI delivery.  */
    1.16 +        irq_desc_t *desc = &irq_desc[vec];
    1.17 +        regs->entry_vector = vec;
    1.18 +        spin_lock(&desc->lock);
    1.19 +        desc->handler->ack(vec);
    1.20 +        desc->action->handler(vector_to_irq(vec), desc->action->dev_id, regs);
    1.21 +        desc->handler->end(vec);
    1.22 +        spin_unlock(&desc->lock);
    1.23      } else if (vec != -1) {
    1.24          DBG("EE:0x%lx isrc: %d\n", regs->msr, vec);
    1.25          regs->entry_vector = vec;
    1.26 @@ -271,10 +271,10 @@ void send_IPI_mask(cpumask_t mask, int v
    1.27      switch(vector) {
    1.28      case CALL_FUNCTION_VECTOR:
    1.29      case EVENT_CHECK_VECTOR:
    1.30 -	break;
    1.31 +        break;
    1.32      default:
    1.33 -	BUG();
    1.34 -	return;
    1.35 +        BUG();
    1.36 +        return;
    1.37      }
    1.38  
    1.39      BUG_ON(NR_CPUS > bits);
     2.1 --- a/xen/arch/powerpc/mpic.c	Wed Nov 22 16:09:28 2006 -0500
     2.2 +++ b/xen/arch/powerpc/mpic.c	Wed Nov 22 16:29:25 2006 -0500
     2.3 @@ -15,15 +15,15 @@
     2.4  /* XXX Xen hacks ... */
     2.5  /* make this generic */
     2.6  
     2.7 -#define le32_to_cpu(x) \
     2.8 -({ \
     2.9 -	__u32 __x = (x); \
    2.10 -	((__u32)( \
    2.11 -		(((__u32)(__x) & (__u32)0x000000ffUL) << 24) | \
    2.12 -		(((__u32)(__x) & (__u32)0x0000ff00UL) <<  8) | \
    2.13 -		(((__u32)(__x) & (__u32)0x00ff0000UL) >>  8) | \
    2.14 -		(((__u32)(__x) & (__u32)0xff000000UL) >> 24) )); \
    2.15 -})
    2.16 +#define le32_to_cpu(x)                                          \
    2.17 +    ({                                                          \
    2.18 +        __u32 __x = (x);                                        \
    2.19 +        ((__u32)(                                               \
    2.20 +             (((__u32)(__x) & (__u32)0x000000ffUL) << 24) |     \
    2.21 +             (((__u32)(__x) & (__u32)0x0000ff00UL) <<  8) |     \
    2.22 +             (((__u32)(__x) & (__u32)0x00ff0000UL) >>  8) |     \
    2.23 +             (((__u32)(__x) & (__u32)0xff000000UL) >> 24) ));   \
    2.24 +    })
    2.25  
    2.26  
    2.27  #define alloc_bootmem(x) xmalloc_bytes(x)
    2.28 @@ -117,7 +117,7 @@ static DEFINE_SPINLOCK(mpic_lock);
    2.29  
    2.30  
    2.31  static inline u32 _mpic_read(unsigned int be, volatile u32 __iomem *base,
    2.32 -			    unsigned int reg)
    2.33 +                             unsigned int reg)
    2.34  {
    2.35  	if (be)
    2.36  		return in_be32(base + (reg >> 2));
    2.37 @@ -126,7 +126,7 @@ static inline u32 _mpic_read(unsigned in
    2.38  }
    2.39  
    2.40  static inline void _mpic_write(unsigned int be, volatile u32 __iomem *base,
    2.41 -			      unsigned int reg, u32 value)
    2.42 +                               unsigned int reg, u32 value)
    2.43  {
    2.44  	if (be)
    2.45  		out_be32(base + (reg >> 2), value);
    2.46 @@ -177,17 +177,17 @@ static inline u32 _mpic_irq_read(struct 
    2.47  	unsigned int	idx = src_no & mpic->isu_mask;
    2.48  
    2.49  	return _mpic_read(mpic->flags & MPIC_BIG_ENDIAN, mpic->isus[isu],
    2.50 -			  reg + (idx * MPIC_IRQ_STRIDE));
    2.51 +                      reg + (idx * MPIC_IRQ_STRIDE));
    2.52  }
    2.53  
    2.54  static inline void _mpic_irq_write(struct mpic *mpic, unsigned int src_no,
    2.55 -				   unsigned int reg, u32 value)
    2.56 +                                   unsigned int reg, u32 value)
    2.57  {
    2.58  	unsigned int	isu = src_no >> mpic->isu_shift;
    2.59  	unsigned int	idx = src_no & mpic->isu_mask;
    2.60  
    2.61  	_mpic_write(mpic->flags & MPIC_BIG_ENDIAN, mpic->isus[isu],
    2.62 -		    reg + (idx * MPIC_IRQ_STRIDE), value);
    2.63 +                reg + (idx * MPIC_IRQ_STRIDE), value);
    2.64  }
    2.65  
    2.66  #define mpic_read(b,r)		_mpic_read(mpic->flags & MPIC_BIG_ENDIAN,(b),(r))
    2.67 @@ -252,7 +252,7 @@ static inline void mpic_ht_end_irq(struc
    2.68  }
    2.69  
    2.70  static void mpic_startup_ht_interrupt(struct mpic *mpic, unsigned int source,
    2.71 -				      unsigned int irqflags)
    2.72 +                                      unsigned int irqflags)
    2.73  {
    2.74  	struct mpic_irq_fixup *fixup = &mpic->fixups[source];
    2.75  	unsigned long flags;
    2.76 @@ -275,7 +275,7 @@ static void mpic_startup_ht_interrupt(st
    2.77  }
    2.78  
    2.79  static void mpic_shutdown_ht_interrupt(struct mpic *mpic, unsigned int source,
    2.80 -				       unsigned int irqflags)
    2.81 +                                       unsigned int irqflags)
    2.82  {
    2.83  	struct mpic_irq_fixup *fixup = &mpic->fixups[source];
    2.84  	unsigned long flags;
    2.85 @@ -296,7 +296,7 @@ static void mpic_shutdown_ht_interrupt(s
    2.86  }
    2.87  
    2.88  static void __init mpic_scan_ht_pic(struct mpic *mpic, u8 __iomem *devbase,
    2.89 -				    unsigned int devfn, u32 vdid)
    2.90 +                                    unsigned int devfn, u32 vdid)
    2.91  {
    2.92  	int i, irq, n;
    2.93  	u8 __iomem *base;
    2.94 @@ -476,8 +476,8 @@ static void mpic_enable_irq(unsigned int
    2.95  	DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, irq, src);
    2.96  
    2.97  	mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI,
    2.98 -		       mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) &
    2.99 -		       ~MPIC_VECPRI_MASK);
   2.100 +                   mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) &
   2.101 +                   ~MPIC_VECPRI_MASK);
   2.102  
   2.103  	/* make sure mask gets to controller before we return to user */
   2.104  	do {
   2.105 @@ -523,8 +523,8 @@ static void mpic_disable_irq(unsigned in
   2.106  	DBG("%s: disable_irq: %d (src %d)\n", mpic->name, irq, src);
   2.107  
   2.108  	mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI,
   2.109 -		       mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) |
   2.110 -		       MPIC_VECPRI_MASK);
   2.111 +                   mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) |
   2.112 +                   MPIC_VECPRI_MASK);
   2.113  
   2.114  	/* make sure mask gets to controller before we return to user */
   2.115  	do {
   2.116 @@ -614,7 +614,7 @@ static void mpic_set_affinity(unsigned i
   2.117  	cpus_and(tmp, cpumask, cpu_online_map);
   2.118  
   2.119  	mpic_irq_write(irq - mpic->irq_offset, MPIC_IRQ_DESTINATION,
   2.120 -		       mpic_physmask(cpus_addr(tmp)[0]));	
   2.121 +                   mpic_physmask(cpus_addr(tmp)[0]));	
   2.122  }
   2.123  
   2.124  
   2.125 @@ -624,14 +624,14 @@ static void mpic_set_affinity(unsigned i
   2.126  
   2.127  
   2.128  struct mpic * __init mpic_alloc(unsigned long phys_addr,
   2.129 -				unsigned int flags,
   2.130 -				unsigned int isu_size,
   2.131 -				unsigned int irq_offset,
   2.132 -				unsigned int irq_count,
   2.133 -				unsigned int ipi_offset,
   2.134 -				unsigned char *senses,
   2.135 -				unsigned int senses_count,
   2.136 -				const char *name)
   2.137 +                                unsigned int flags,
   2.138 +                                unsigned int isu_size,
   2.139 +                                unsigned int irq_offset,
   2.140 +                                unsigned int irq_count,
   2.141 +                                unsigned int ipi_offset,
   2.142 +                                unsigned char *senses,
   2.143 +                                unsigned int senses_count,
   2.144 +                                const char *name)
   2.145  {
   2.146  	struct mpic	*mpic;
   2.147  	u32		reg;
   2.148 @@ -678,8 +678,8 @@ struct mpic * __init mpic_alloc(unsigned
   2.149  	/* Reset */
   2.150  	if (flags & MPIC_WANTS_RESET) {
   2.151  		mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_0,
   2.152 -			   mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_0)
   2.153 -			   | MPIC_GREG_GCONF_RESET);
   2.154 +                   mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_0)
   2.155 +                   | MPIC_GREG_GCONF_RESET);
   2.156  		while( mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_0)
   2.157  		       & MPIC_GREG_GCONF_RESET)
   2.158  			mb();
   2.159 @@ -691,15 +691,15 @@ struct mpic * __init mpic_alloc(unsigned
   2.160  	 */
   2.161  	reg = mpic_read(mpic->gregs, MPIC_GREG_FEATURE_0);
   2.162  	mpic->num_cpus = ((reg & MPIC_GREG_FEATURE_LAST_CPU_MASK)
   2.163 -			  >> MPIC_GREG_FEATURE_LAST_CPU_SHIFT) + 1;
   2.164 +                      >> MPIC_GREG_FEATURE_LAST_CPU_SHIFT) + 1;
   2.165  	if (isu_size == 0)
   2.166  		mpic->num_sources = ((reg & MPIC_GREG_FEATURE_LAST_SRC_MASK)
   2.167 -				     >> MPIC_GREG_FEATURE_LAST_SRC_SHIFT) + 1;
   2.168 +                             >> MPIC_GREG_FEATURE_LAST_SRC_SHIFT) + 1;
   2.169  
   2.170  	/* Map the per-CPU registers */
   2.171  	for (i = 0; i < mpic->num_cpus; i++) {
   2.172  		mpic->cpuregs[i] = ioremap(phys_addr + MPIC_CPU_BASE +
   2.173 -					   i * MPIC_CPU_STRIDE, 0x1000);
   2.174 +                                   i * MPIC_CPU_STRIDE, 0x1000);
   2.175  		BUG_ON(mpic->cpuregs[i] == NULL);
   2.176  	}
   2.177  
   2.178 @@ -707,7 +707,7 @@ struct mpic * __init mpic_alloc(unsigned
   2.179  	if (mpic->isu_size == 0) {
   2.180  		mpic->isu_size = mpic->num_sources;
   2.181  		mpic->isus[0] = ioremap(phys_addr + MPIC_IRQ_BASE,
   2.182 -					MPIC_IRQ_STRIDE * mpic->isu_size);
   2.183 +                                MPIC_IRQ_STRIDE * mpic->isu_size);
   2.184  		BUG_ON(mpic->isus[0] == NULL);
   2.185  	}
   2.186  	mpic->isu_shift = 1 + __ilog2(mpic->isu_size - 1);
   2.187 @@ -743,7 +743,7 @@ struct mpic * __init mpic_alloc(unsigned
   2.188  }
   2.189  
   2.190  void __init mpic_assign_isu(struct mpic *mpic, unsigned int isu_num,
   2.191 -			    unsigned long phys_addr)
   2.192 +                            unsigned long phys_addr)
   2.193  {
   2.194  	unsigned int isu_first = isu_num * mpic->isu_size;
   2.195  
   2.196 @@ -755,7 +755,7 @@ void __init mpic_assign_isu(struct mpic 
   2.197  }
   2.198  
   2.199  void __init mpic_setup_cascade(unsigned int irq, mpic_cascade_t handler,
   2.200 -			       void *data)
   2.201 +                               void *data)
   2.202  {
   2.203  	struct mpic *mpic = mpic_find(irq, NULL);
   2.204  	unsigned long flags;
   2.205 @@ -790,20 +790,20 @@ void __init mpic_init(struct mpic *mpic)
   2.206  	/* Initialize timers: just disable them all */
   2.207  	for (i = 0; i < 4; i++) {
   2.208  		mpic_write(mpic->tmregs,
   2.209 -			   i * MPIC_TIMER_STRIDE + MPIC_TIMER_DESTINATION, 0);
   2.210 +                   i * MPIC_TIMER_STRIDE + MPIC_TIMER_DESTINATION, 0);
   2.211  		mpic_write(mpic->tmregs,
   2.212 -			   i * MPIC_TIMER_STRIDE + MPIC_TIMER_VECTOR_PRI,
   2.213 -			   MPIC_VECPRI_MASK |
   2.214 -			   (MPIC_VEC_TIMER_0 + i));
   2.215 +                   i * MPIC_TIMER_STRIDE + MPIC_TIMER_VECTOR_PRI,
   2.216 +                   MPIC_VECPRI_MASK |
   2.217 +                   (MPIC_VEC_TIMER_0 + i));
   2.218  	}
   2.219  
   2.220  	/* Initialize IPIs to our reserved vectors and mark them disabled for now */
   2.221  	mpic_test_broken_ipi(mpic);
   2.222  	for (i = 0; i < 4; i++) {
   2.223  		mpic_ipi_write(i,
   2.224 -			       MPIC_VECPRI_MASK |
   2.225 -			       (10 << MPIC_VECPRI_PRIORITY_SHIFT) |
   2.226 -			       (MPIC_VEC_IPI_0 + i));
   2.227 +                       MPIC_VECPRI_MASK |
   2.228 +                       (10 << MPIC_VECPRI_PRIORITY_SHIFT) |
   2.229 +                       (MPIC_VEC_IPI_0 + i));
   2.230  #ifdef CONFIG_SMP
   2.231  		if (!(mpic->flags & MPIC_PRIMARY))
   2.232  			continue;
   2.233 @@ -850,7 +850,7 @@ void __init mpic_init(struct mpic *mpic)
   2.234  #ifdef CONFIG_MPIC_BROKEN_U3
   2.235  			if (mpic_is_ht_interrupt(mpic, i)) {
   2.236  				vecpri &= ~(MPIC_VECPRI_SENSE_MASK |
   2.237 -					    MPIC_VECPRI_POLARITY_MASK);
   2.238 +                            MPIC_VECPRI_POLARITY_MASK);
   2.239  				vecpri |= MPIC_VECPRI_POLARITY_POSITIVE;
   2.240  			}
   2.241  #else
   2.242 @@ -864,7 +864,7 @@ void __init mpic_init(struct mpic *mpic)
   2.243  		/* init hw */
   2.244  		mpic_irq_write(i, MPIC_IRQ_VECTOR_PRI, vecpri);
   2.245  		mpic_irq_write(i, MPIC_IRQ_DESTINATION,
   2.246 -			       1 << hard_smp_processor_id());
   2.247 +                       1 << hard_smp_processor_id());
   2.248  
   2.249  		/* init linux descriptors */
   2.250  		if (i < mpic->irq_count) {
   2.251 @@ -878,8 +878,8 @@ void __init mpic_init(struct mpic *mpic)
   2.252  
   2.253  	/* Disable 8259 passthrough */
   2.254  	mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_0,
   2.255 -		   mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_0)
   2.256 -		   | MPIC_GREG_GCONF_8259_PTHROU_DIS);
   2.257 +               mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_0)
   2.258 +               | MPIC_GREG_GCONF_8259_PTHROU_DIS);
   2.259  
   2.260  	/* Set current processor priority to 0 */
   2.261  	mpic_cpu_write(MPIC_CPU_CURRENT_TASK_PRI, 0);
   2.262 @@ -899,12 +899,12 @@ void mpic_irq_set_priority(unsigned int 
   2.263  		reg = mpic_ipi_read(irq - mpic->ipi_offset) &
   2.264  			~MPIC_VECPRI_PRIORITY_MASK;
   2.265  		mpic_ipi_write(irq - mpic->ipi_offset,
   2.266 -			       reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT));
   2.267 +                       reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT));
   2.268  	} else {
   2.269  		reg = mpic_irq_read(irq - mpic->irq_offset,MPIC_IRQ_VECTOR_PRI)
   2.270  			& ~MPIC_VECPRI_PRIORITY_MASK;
   2.271  		mpic_irq_write(irq - mpic->irq_offset, MPIC_IRQ_VECTOR_PRI,
   2.272 -			       reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT));
   2.273 +                       reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT));
   2.274  	}
   2.275  	spin_unlock_irqrestore(&mpic_lock, flags);
   2.276  }
   2.277 @@ -947,7 +947,7 @@ void mpic_setup_this_cpu(void)
   2.278  	if (distribute_irqs) {
   2.279  	 	for (i = 0; i < mpic->num_sources ; i++)
   2.280  			mpic_irq_write(i, MPIC_IRQ_DESTINATION,
   2.281 -				mpic_irq_read(i, MPIC_IRQ_DESTINATION) | msk);
   2.282 +                           mpic_irq_read(i, MPIC_IRQ_DESTINATION) | msk);
   2.283  	}
   2.284  
   2.285  	/* Set current processor priority to 0 */
   2.286 @@ -992,7 +992,7 @@ void mpic_teardown_this_cpu(int secondar
   2.287  	/* let the mpic know we don't want intrs.  */
   2.288  	for (i = 0; i < mpic->num_sources ; i++)
   2.289  		mpic_irq_write(i, MPIC_IRQ_DESTINATION,
   2.290 -			mpic_irq_read(i, MPIC_IRQ_DESTINATION) & ~msk);
   2.291 +                       mpic_irq_read(i, MPIC_IRQ_DESTINATION) & ~msk);
   2.292  
   2.293  	/* Set current processor priority to max */
   2.294  	mpic_cpu_write(MPIC_CPU_CURRENT_TASK_PRI, 0xf);
   2.295 @@ -1012,7 +1012,7 @@ void mpic_send_ipi(unsigned int ipi_no, 
   2.296  #endif
   2.297  
   2.298  	mpic_cpu_write(MPIC_CPU_IPI_DISPATCH_0 + ipi_no * 0x10,
   2.299 -		       mpic_physmask(cpu_mask & cpus_addr(cpu_online_map)[0]));
   2.300 +                   mpic_physmask(cpu_mask & cpus_addr(cpu_online_map)[0]));
   2.301  }
   2.302  
   2.303  int mpic_get_one_irq(struct mpic *mpic, struct pt_regs *regs)
   2.304 @@ -1040,7 +1040,7 @@ int mpic_get_one_irq(struct mpic *mpic, 
   2.305  		return irq + mpic->irq_offset;
   2.306  	}
   2.307  #ifdef DEBUG_IPI
   2.308 -       	DBG("%s: ipi %d !\n", mpic->name, irq - MPIC_VEC_IPI_0);
   2.309 +    DBG("%s: ipi %d !\n", mpic->name, irq - MPIC_VEC_IPI_0);
   2.310  #endif
   2.311  	return irq - MPIC_VEC_IPI_0 + mpic->ipi_offset;
   2.312  }
   2.313 @@ -1066,13 +1066,13 @@ void mpic_request_ipis(void)
   2.314  
   2.315  	/* IPIs are marked SA_INTERRUPT as they must run with irqs disabled */
   2.316  	request_irq(mpic->ipi_offset+0, mpic_ipi_action, SA_INTERRUPT,
   2.317 -		    "IPI0 (call function)", mpic);
   2.318 +                "IPI0 (call function)", mpic);
   2.319  	request_irq(mpic->ipi_offset+1, mpic_ipi_action, SA_INTERRUPT,
   2.320 -		   "IPI1 (reschedule)", mpic);
   2.321 +                "IPI1 (reschedule)", mpic);
   2.322  	request_irq(mpic->ipi_offset+2, mpic_ipi_action, SA_INTERRUPT,
   2.323 -		   "IPI2 (unused)", mpic);
   2.324 +                "IPI2 (unused)", mpic);
   2.325  	request_irq(mpic->ipi_offset+3, mpic_ipi_action, SA_INTERRUPT,
   2.326 -		   "IPI3 (debugger break)", mpic);
   2.327 +                "IPI3 (debugger break)", mpic);
   2.328  
   2.329  	printk("IPIs requested... \n");
   2.330  }
     3.1 --- a/xen/arch/powerpc/mpic_init.c	Wed Nov 22 16:09:28 2006 -0500
     3.2 +++ b/xen/arch/powerpc/mpic_init.c	Wed Nov 22 16:29:25 2006 -0500
     3.3 @@ -75,7 +75,7 @@ static unsigned long reg2(void *oft_p, o
     3.4      rc = ofd_getprop(oft_p, c, "reg", &isa_reg, sizeof(isa_reg));
     3.5  
     3.6      DBG("%s: reg property address=0x%08x  size=0x%08x\n", __func__,
     3.7 -                    isa_reg.address, isa_reg.size);
     3.8 +        isa_reg.address, isa_reg.size);
     3.9      return isa_reg.address;
    3.10  }
    3.11  
    3.12 @@ -93,7 +93,7 @@ static unsigned long reg1(void *oft_p, o
    3.13      rc = ofd_getprop(oft_p, c, "reg", &reg, sizeof(reg));
    3.14  
    3.15      DBG("%s: reg property address=0x%08x  size=0x%08x\n", __func__,
    3.16 -                        reg.address, reg.size);
    3.17 +        reg.address, reg.size);
    3.18      return reg.address;
    3.19  }
    3.20  
    3.21 @@ -174,15 +174,15 @@ static unsigned long find_ranges_addr_fr
    3.22          break;
    3.23      case 2:
    3.24          ranges_addr = (((u64)ranges[ranges_i]) << 32) |
    3.25 -                      ranges[ranges_i + 1];
    3.26 +            ranges[ranges_i + 1];
    3.27          break;
    3.28      case 3:  /* the G5 case, how to squeeze 96 bits into 64 */
    3.29          ranges_addr = (((u64)ranges[ranges_i+1]) << 32) |
    3.30 -                      ranges[ranges_i + 2];
    3.31 +            ranges[ranges_i + 2];
    3.32          break;
    3.33      case 4:
    3.34          ranges_addr = (((u64)ranges[ranges_i+2]) << 32) |
    3.35 -                      ranges[ranges_i + 4];
    3.36 +            ranges[ranges_i + 4];
    3.37          break;
    3.38      default:
    3.39          PANIC("#address-cells out of range\n");
    3.40 @@ -267,7 +267,7 @@ static int find_mpic_canonical_probe(voi
    3.41       * We select the one without an 'interrupt' property.
    3.42       */
    3.43      c = ofd_node_find_by_prop(oft_p, OFD_ROOT, "device_type", mpic_type,
    3.44 -                                        sizeof(mpic_type));
    3.45 +                              sizeof(mpic_type));
    3.46      while (c > 0) {
    3.47          int int_len;
    3.48          int good_mpic;
    3.49 @@ -366,8 +366,8 @@ static unsigned int mpic_startup_ipi(uns
    3.50  }
    3.51  
    3.52  int request_irq(unsigned int irq,
    3.53 -		irqreturn_t (*handler)(int, void *, struct cpu_user_regs *),
    3.54 -		unsigned long irqflags, const char * devname, void *dev_id)
    3.55 +                irqreturn_t (*handler)(int, void *, struct cpu_user_regs *),
    3.56 +                unsigned long irqflags, const char * devname, void *dev_id)
    3.57  {
    3.58      int retval;
    3.59      struct irqaction *action;
    3.60 @@ -375,8 +375,8 @@ int request_irq(unsigned int irq,
    3.61  
    3.62      action = xmalloc(struct irqaction);
    3.63      if (!action) {
    3.64 -	BUG();
    3.65 -	return -ENOMEM;
    3.66 +        BUG();
    3.67 +        return -ENOMEM;
    3.68      }
    3.69  
    3.70      /* Xen's handler prototype is slightly different than Linux's.  */
    3.71 @@ -388,8 +388,8 @@ int request_irq(unsigned int irq,
    3.72  
    3.73      retval = setup_irq(irq, action);
    3.74      if (retval) {
    3.75 -	BUG();
    3.76 -	xfree(action);
    3.77 +        BUG();
    3.78 +        xfree(action);
    3.79      }
    3.80  
    3.81      return retval;
     4.1 --- a/xen/arch/powerpc/setup.c	Wed Nov 22 16:09:28 2006 -0500
     4.2 +++ b/xen/arch/powerpc/setup.c	Wed Nov 22 16:29:25 2006 -0500
     4.3 @@ -1,8 +1,8 @@
     4.4  /*
     4.5 - * This program is free software; you can redistribute it and/or modify
     4.6 - * it under the terms of the GNU General Public License as published by
     4.7 - * the Free Software Foundation; either version 2 of the License, or
     4.8 - * (at your option) any later version.
     4.9 + * This program is free software; you can redistribute it and/or
    4.10 + * modify it under the terms of the GNU General Public License as
    4.11 + * published by the Free Software Foundation; either version 2 of the
    4.12 + * License, or (at your option) any later version.
    4.13   *
    4.14   * This program is distributed in the hope that it will be useful,
    4.15   * but WITHOUT ANY WARRANTY; without even the implied warranty of
    4.16 @@ -393,10 +393,10 @@ static void __init __start_xen(multiboot
    4.17      }
    4.18  
    4.19      init_xenheap_pages(ALIGN_UP(dom0_start, PAGE_SIZE),
    4.20 -                 ALIGN_DOWN(dom0_start + dom0_len, PAGE_SIZE));
    4.21 +                       ALIGN_DOWN(dom0_start + dom0_len, PAGE_SIZE));
    4.22      if (initrd_start)
    4.23          init_xenheap_pages(ALIGN_UP(initrd_start, PAGE_SIZE),
    4.24 -                     ALIGN_DOWN(initrd_start + initrd_len, PAGE_SIZE));
    4.25 +                           ALIGN_DOWN(initrd_start + initrd_len, PAGE_SIZE));
    4.26  
    4.27      init_trace_bufs();
    4.28  
     5.1 --- a/xen/arch/powerpc/smp.c	Wed Nov 22 16:09:28 2006 -0500
     5.2 +++ b/xen/arch/powerpc/smp.c	Wed Nov 22 16:29:25 2006 -0500
     5.3 @@ -13,9 +13,10 @@
     5.4   * along with this program; if not, write to the Free Software
     5.5   * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
     5.6   *
     5.7 - * Copyright (C) IBM Corp. 2005
     5.8 + * Copyright (C) IBM Corp. 2005,2006
     5.9   *
    5.10   * Authors: Hollis Blanchard <hollisb@us.ibm.com>
    5.11 + * Authors: Amos Waterland <apw@us.ibm.com>
    5.12   */
    5.13  
    5.14  #include <xen/cpumask.h>
    5.15 @@ -32,15 +33,15 @@ int ht_per_core = 1;
    5.16  void __flush_tlb_mask(cpumask_t mask, unsigned long addr)
    5.17  {
    5.18      if (cpu_isset(smp_processor_id(), mask)) {
    5.19 -            cpu_clear(smp_processor_id(), mask);
    5.20 -            if (cpus_empty(mask)) {
    5.21 -                /* only local */
    5.22 -                if (addr == FLUSH_ALL_ADDRS)
    5.23 -                    local_flush_tlb();
    5.24 -                else
    5.25 -                    local_flush_tlb_one(addr);
    5.26 -                return;
    5.27 -            }
    5.28 +        cpu_clear(smp_processor_id(), mask);
    5.29 +        if (cpus_empty(mask)) {
    5.30 +            /* only local */
    5.31 +            if (addr == FLUSH_ALL_ADDRS)
    5.32 +                local_flush_tlb();
    5.33 +            else
    5.34 +                local_flush_tlb_one(addr);
    5.35 +            return;
    5.36 +        }
    5.37      }
    5.38      /* if we are still here and the mask is non-empty, then we need to
    5.39       * flush other TLBs so we flush em all */
    5.40 @@ -57,7 +58,7 @@ void smp_send_event_check_mask(cpumask_t
    5.41  
    5.42  
    5.43  int smp_call_function(void (*func) (void *info), void *info, int retry,
    5.44 -        int wait)
    5.45 +                      int wait)
    5.46  {
    5.47      cpumask_t allbutself = cpu_online_map;
    5.48      cpu_clear(smp_processor_id(), allbutself);
    5.49 @@ -105,20 +106,20 @@ int on_selected_cpus(
    5.50  
    5.51      /* We always wait for an initiation ACK from remote CPU.  */
    5.52      for (t = 0; atomic_read(&call_data.started) != nr_cpus; t++) {
    5.53 -	if (t && t % timebase_freq == 0) {
    5.54 -	    printk("IPI start stall: %d ACKS to %d SYNS\n", 
    5.55 -		   atomic_read(&call_data.started), nr_cpus);
    5.56 -	}
    5.57 +        if (t && t % timebase_freq == 0) {
    5.58 +            printk("IPI start stall: %d ACKS to %d SYNS\n", 
    5.59 +                   atomic_read(&call_data.started), nr_cpus);
    5.60 +        }
    5.61      }
    5.62  
    5.63      /* If told to, we wait for a completion ACK from remote CPU.  */
    5.64      if (wait) {
    5.65 -	for (t = 0; atomic_read(&call_data.finished) != nr_cpus; t++) {
    5.66 -	    if (t > timebase_freq && t % timebase_freq == 0) {
    5.67 -		printk("IPI finish stall: %d ACKS to %d SYNS\n", 
    5.68 -		       atomic_read(&call_data.finished), nr_cpus);
    5.69 -	    }
    5.70 -	}
    5.71 +        for (t = 0; atomic_read(&call_data.finished) != nr_cpus; t++) {
    5.72 +            if (t > timebase_freq && t % timebase_freq == 0) {
    5.73 +                printk("IPI finish stall: %d ACKS to %d SYNS\n", 
    5.74 +                       atomic_read(&call_data.finished), nr_cpus);
    5.75 +            }
    5.76 +        }
    5.77      }
    5.78  
    5.79      spin_unlock(&call_lock);
    5.80 @@ -139,7 +140,7 @@ void smp_call_function_interrupt(struct 
    5.81      mb();
    5.82  
    5.83      if (wait)
    5.84 -	atomic_inc(&call_data.finished);
    5.85 +        atomic_inc(&call_data.finished);
    5.86  
    5.87      return;
    5.88  }
    5.89 @@ -154,14 +155,14 @@ void smp_message_recv(int msg, struct cp
    5.90  {
    5.91      switch(msg) {
    5.92      case CALL_FUNCTION_VECTOR:
    5.93 -	smp_call_function_interrupt(regs);
    5.94 -	break;
    5.95 +        smp_call_function_interrupt(regs);
    5.96 +        break;
    5.97      case EVENT_CHECK_VECTOR:
    5.98          smp_event_check_interrupt();
    5.99 -	break;
   5.100 +        break;
   5.101      default:
   5.102 -	BUG();
   5.103 -	break;
   5.104 +        BUG();
   5.105 +        break;
   5.106      }
   5.107  }
   5.108  
   5.109 @@ -181,19 +182,19 @@ void ipi_torture_test(void)
   5.110      cpus_clear(mask);
   5.111  
   5.112      while (tick < 1000000) {
   5.113 -	for_each_online_cpu(cpu) {
   5.114 -	    cpu_set(cpu, mask);
   5.115 -	    before = mftb();
   5.116 -	    on_selected_cpus(mask, debug_ipi_ack, NULL, 1, 1);
   5.117 -	    after = mftb();
   5.118 -	    cpus_clear(mask);
   5.119 +        for_each_online_cpu(cpu) {
   5.120 +            cpu_set(cpu, mask);
   5.121 +            before = mftb();
   5.122 +            on_selected_cpus(mask, debug_ipi_ack, NULL, 1, 1);
   5.123 +            after = mftb();
   5.124 +            cpus_clear(mask);
   5.125  
   5.126 -	    delta = after - before;
   5.127 -	    if (delta > max) max = delta;
   5.128 -	    if (delta < min) min = delta;
   5.129 -	    sum += delta;
   5.130 -	    tick++;
   5.131 -	}
   5.132 +            delta = after - before;
   5.133 +            if (delta > max) max = delta;
   5.134 +            if (delta < min) min = delta;
   5.135 +            sum += delta;
   5.136 +            tick++;
   5.137 +        }
   5.138      }
   5.139  
   5.140      mean = sum / tick;