1.1 --- a/xen/arch/powerpc/dart.c	Wed Sep 13 18:41:11 2006 -0400
     1.2 +++ b/xen/arch/powerpc/dart.c	Thu Sep 14 01:12:26 2006 -0400
     1.3 @@ -114,7 +114,7 @@ static void dart_fill(ulong index, int p
     1.4          ++rpg;
     1.5          if (i == num_pg) break;
     1.6  
     1.7 -        if (((ulong)&entry[i]) % CACHE_LINE_SIZE == 0) {
     1.8 +        if ((((ulong)&entry[i]) % cpu_caches.dline_size) == 0) {
     1.9              last_flush = (ulong)&entry[i - 1];
    1.10              dcbst(last_flush);
    1.11          }
    1.12 @@ -134,7 +134,7 @@ static void dart_clear(ulong index, ulon
    1.13          ++i;
    1.14          if (i == num_pg) break;
    1.15  
    1.16 -        if (((ulong)&entry[i]) % CACHE_LINE_SIZE == 0) {
    1.17 +        if ((((ulong)&entry[i]) % cpu_caches.dline_size) == 0) {
    1.18              last_flush = (ulong)&entry[i - 1];
    1.19              dcbst(last_flush);
    1.20          }
    1.21 @@ -263,7 +263,7 @@ static int init_dart(void)
    1.22      /* Linux uses a dummy page, filling "empty" DART entries with a
    1.23         reference to this page to capture stray DMA's */
    1.24      dummy_page = (ulong)alloc_xenheap_pages(1);
    1.25 -    memset((void *)dummy_page, 0, PAGE_SIZE);
    1.26 +    clear_page((void *)dummy_page);
    1.27      dummy_page >>= PAGE_SHIFT;
    1.28  
    1.29      printk("Initializing DART 0x%lx: tbl: %p[0x%lx] entries: 0x%lx\n",

     2.1 --- a/xen/arch/powerpc/powerpc64/ppc970.c	Wed Sep 13 18:41:11 2006 -0400
     2.2 +++ b/xen/arch/powerpc/powerpc64/ppc970.c	Thu Sep 14 01:12:26 2006 -0400
     2.3 @@ -34,6 +34,15 @@
     2.4  #undef DEBUG
     2.5  #undef SERIALIZE
     2.6  
     2.7 +struct cpu_caches cpu_caches = {
     2.8 +	.dline_size = 0x80,
     2.9 +	.log_dline_size = 7,
    2.10 +    .dlines_per_page = PAGE_SIZE >> 7,
    2.11 +	.iline_size = 0x80,
    2.12 +	.log_iline_size = 7,
    2.13 +    .ilines_per_page = PAGE_SIZE >> 7,
    2.14 +};
    2.15 +
    2.16  struct rma_settings {
    2.17      int order;
    2.18      int rmlr_0;

     3.1 --- a/xen/include/asm-powerpc/cache.h	Wed Sep 13 18:41:11 2006 -0400
     3.2 +++ b/xen/include/asm-powerpc/cache.h	Thu Sep 14 01:12:26 2006 -0400
     3.3 @@ -59,4 +59,15 @@ static __inline__ void synchronize_cache
     3.4  
     3.5  #define __read_mostly
     3.6  
     3.7 +struct cpu_caches {
     3.8 +	u32	dsize;			/* L1 d-cache size */
     3.9 +	u32	dline_size;		/* L1 d-cache line size	*/
    3.10 +	u32	log_dline_size;
    3.11 +	u32	dlines_per_page;
    3.12 +	u32	isize;			/* L1 i-cache size */
    3.13 +	u32	iline_size;		/* L1 i-cache line size	*/
    3.14 +	u32	log_iline_size;
    3.15 +	u32	ilines_per_page;
    3.16 +};
    3.17 +extern struct cpu_caches cpu_caches;
    3.18  #endif

     4.1 --- a/xen/include/asm-powerpc/config.h	Wed Sep 13 18:41:11 2006 -0400
     4.2 +++ b/xen/include/asm-powerpc/config.h	Thu Sep 14 01:12:26 2006 -0400
     4.3 @@ -44,9 +44,6 @@ extern char __bss_start[];
     4.4  #define ALIGN_UP(addr,size) (((addr)+((size)-1))&(~((size)-1)))
     4.5  #define ALIGN_DOWN(addr,size) ((addr)&(~((size)-1)))
     4.6  
     4.7 -/* this should be per processor, but for now */
     4.8 -#define CACHE_LINE_SIZE 128
     4.9 -
    4.10  /* 256M - 64M of Xen space seems like a nice number */
    4.11  #define CONFIG_MIN_DOM0_PAGES (192 << (20 - PAGE_SHIFT))
    4.12  #define CONFIG_SHADOW 1