direct-io.hg

changeset 10771:26dae1c72cd9

[IA64] rewrite rfi emulation

This approach of emulating rfi is straightforward

Signed-off-by: Anthony Xu <anthony.xu@intel.com>
author awilliam@xenbuild.aw
date Wed Jul 05 10:23:54 2006 -0600 (2006-07-05)
parents 72caf2612e52
children 2b815d9acdea
files xen/arch/ia64/asm-offsets.c xen/arch/ia64/vmx/vmx_entry.S xen/arch/ia64/vmx/vmx_ivt.S xen/arch/ia64/vmx/vmx_vcpu.c xen/include/public/arch-ia64.h
line diff
     1.1 --- a/xen/arch/ia64/asm-offsets.c	Wed Jul 05 10:03:20 2006 -0600
     1.2 +++ b/xen/arch/ia64/asm-offsets.c	Wed Jul 05 10:23:54 2006 -0600
     1.3 @@ -123,7 +123,6 @@ void foo(void)
     1.4  	DEFINE(IA64_PT_REGS_R6_OFFSET, offsetof (struct pt_regs, r6));
     1.5  	DEFINE(IA64_PT_REGS_R7_OFFSET, offsetof (struct pt_regs, r7));
     1.6  	DEFINE(IA64_PT_REGS_EML_UNAT_OFFSET, offsetof (struct pt_regs, eml_unat));
     1.7 -	DEFINE(IA64_PT_REGS_RFI_PFS_OFFSET, offsetof (struct pt_regs, rfi_pfs));
     1.8  	DEFINE(IA64_VCPU_IIPA_OFFSET, offsetof (struct vcpu, arch.arch_vmx.cr_iipa));
     1.9  	DEFINE(IA64_VCPU_ISR_OFFSET, offsetof (struct vcpu, arch.arch_vmx.cr_isr));
    1.10  	DEFINE(IA64_VCPU_CAUSE_OFFSET, offsetof (struct vcpu, arch.arch_vmx.cause));
    1.11 @@ -180,6 +179,7 @@ void foo(void)
    1.12  	BLANK();
    1.13  
    1.14  	DEFINE(IA64_VPD_BASE_OFFSET, offsetof (struct vcpu, arch.privregs));
    1.15 +	DEFINE(IA64_VPD_VIFS_OFFSET, offsetof (mapped_regs_t, ifs));
    1.16   	DEFINE(IA64_VLSAPIC_INSVC_BASE_OFFSET, offsetof (struct vcpu, arch.insvc[0]));
    1.17  	DEFINE(IA64_VPD_CR_VPTA_OFFSET, offsetof (cr_t, pta));
    1.18  	DEFINE(XXX_THASH_SIZE, sizeof (thash_data_t));
     2.1 --- a/xen/arch/ia64/vmx/vmx_entry.S	Wed Jul 05 10:03:20 2006 -0600
     2.2 +++ b/xen/arch/ia64/vmx/vmx_entry.S	Wed Jul 05 10:23:54 2006 -0600
     2.3 @@ -283,8 +283,8 @@ GLOBAL_ENTRY(ia64_leave_hypervisor)
     2.4      ld8 r19=[r16],PT(R3)-PT(AR_FPSR)    //load ar_fpsr
     2.5      ld8.fill r2=[r17],PT(AR_CCV)-PT(R2)    //load r2
     2.6      ;;
     2.7 -    ld8.fill r3=[r16]    //load r3
     2.8 -    ld8 r18=[r17],PT(RFI_PFS)-PT(AR_CCV)           //load ar_ccv
     2.9 +    ld8.fill r3=[r16]	//load r3
    2.10 +    ld8 r18=[r17]	//load ar_ccv
    2.11      ;;
    2.12      mov ar.fpsr=r19
    2.13      mov ar.ccv=r18
    2.14 @@ -348,7 +348,6 @@ vmx_rse_clear_invalid:
    2.15      ;;
    2.16      mov ar.bspstore=r24
    2.17      ;;
    2.18 -    ld8 r24=[r17]       //load rfi_pfs
    2.19      mov ar.unat=r28
    2.20      mov ar.rnat=r25
    2.21      mov ar.rsc=r26
    2.22 @@ -356,10 +355,6 @@ vmx_rse_clear_invalid:
    2.23      mov cr.ipsr=r31
    2.24      mov cr.iip=r30
    2.25      mov cr.ifs=r29
    2.26 -    cmp.ne p6,p0=r24,r0
    2.27 -(p6)br.sptk vmx_dorfirfi
    2.28 -    ;;
    2.29 -vmx_dorfirfi_back:
    2.30      mov ar.pfs=r27
    2.31      adds r18=IA64_VPD_BASE_OFFSET,r21
    2.32      ;;
    2.33 @@ -370,20 +365,19 @@ vmx_dorfirfi_back:
    2.34      adds r19=VPD(VPSR),r18
    2.35      ;;
    2.36      ld8 r19=[r19]        //vpsr
    2.37 -//vsa_sync_write_start
    2.38      movl r20=__vsa_base
    2.39      ;;
    2.40 +//vsa_sync_write_start
    2.41      ld8 r20=[r20]       // read entry point
    2.42      mov r25=r18
    2.43      ;;
    2.44 +    movl r24=ia64_vmm_entry  // calculate return address
    2.45      add r16=PAL_VPS_SYNC_WRITE,r20
    2.46 -    movl r24=switch_rr7  // calculate return address
    2.47      ;;
    2.48      mov b0=r16
    2.49      br.cond.sptk b0         // call the service
    2.50      ;;
    2.51  END(ia64_leave_hypervisor)
    2.52 -switch_rr7:
    2.53  // fall through
    2.54  GLOBAL_ENTRY(ia64_vmm_entry)
    2.55  /*
    2.56 @@ -416,23 +410,6 @@ ia64_vmm_entry_out:
    2.57      br.cond.sptk b0             // call pal service
    2.58  END(ia64_vmm_entry)
    2.59  
    2.60 -//r24 rfi_pfs
    2.61 -//r17 address of rfi_pfs
    2.62 -GLOBAL_ENTRY(vmx_dorfirfi)
    2.63 -    mov r16=ar.ec
    2.64 -    movl r20 = vmx_dorfirfi_back
    2.65 -	;;
    2.66 -// clean rfi_pfs
    2.67 -    st8 [r17]=r0
    2.68 -    mov b0=r20
    2.69 -// pfs.pec=ar.ec
    2.70 -    dep r24 = r16, r24, 52, 6
    2.71 -    ;;
    2.72 -    mov ar.pfs=r24
    2.73 -	;;
    2.74 -    br.ret.sptk b0
    2.75 -	;;
    2.76 -END(vmx_dorfirfi)
    2.77  
    2.78  #ifdef XEN_DBL_MAPPING  /* will be removed */
    2.79  
     3.1 --- a/xen/arch/ia64/vmx/vmx_ivt.S	Wed Jul 05 10:03:20 2006 -0600
     3.2 +++ b/xen/arch/ia64/vmx/vmx_ivt.S	Wed Jul 05 10:23:54 2006 -0600
     3.3 @@ -58,6 +58,7 @@
     3.4  #include <asm/thread_info.h>
     3.5  #include <asm/unistd.h>
     3.6  #include <asm/vhpt.h>
     3.7 +#include <asm/virt_event.h>
     3.8  
     3.9  #ifdef VTI_DEBUG
    3.10    /*
    3.11 @@ -787,6 +788,22 @@ ENTRY(vmx_virtualization_fault)
    3.12      st8 [r16] = r24
    3.13      st8 [r17] = r25
    3.14      ;;
    3.15 +    cmp.ne p6,p0=EVENT_RFI, r24
    3.16 +    (p6) br.sptk vmx_dispatch_virtualization_fault
    3.17 +    ;;
    3.18 +    adds r18=IA64_VPD_BASE_OFFSET,r21
    3.19 +    ;;
    3.20 +    ld8 r18=[r18]
    3.21 +    ;;
    3.22 +    adds r18=IA64_VPD_VIFS_OFFSET,r18
    3.23 +    ;;
    3.24 +    ld8 r18=[r18]
    3.25 +    ;;
    3.26 +    tbit.z p6,p0=r18,63
    3.27 +    (p6) br.sptk vmx_dispatch_virtualization_fault
    3.28 +    ;;
    3.29 +    //if vifs.v=1 desert current register frame
    3.30 +    alloc r18=ar.pfs,0,0,0,0
    3.31      br.sptk vmx_dispatch_virtualization_fault
    3.32  END(vmx_virtualization_fault)
    3.33  
     4.1 --- a/xen/arch/ia64/vmx/vmx_vcpu.c	Wed Jul 05 10:03:20 2006 -0600
     4.2 +++ b/xen/arch/ia64/vmx/vmx_vcpu.c	Wed Jul 05 10:23:54 2006 -0600
     4.3 @@ -280,11 +280,8 @@ IA64FAULT vmx_vcpu_rfi(VCPU *vcpu)
     4.4      vcpu_bsw1(vcpu);
     4.5      vmx_vcpu_set_psr(vcpu,psr);
     4.6      ifs=VCPU(vcpu,ifs);
     4.7 -    if((ifs>>63)&&(ifs<<1)){
     4.8 -        ifs=(regs->cr_ifs)&0x7f;
     4.9 -        regs->rfi_pfs = (ifs<<7)|ifs;
    4.10 -        regs->cr_ifs = VCPU(vcpu,ifs);
    4.11 -    }
    4.12 +    if(ifs>>63)
    4.13 +        regs->cr_ifs = ifs;
    4.14      regs->cr_iip = VCPU(vcpu,iip);
    4.15      return (IA64_NO_FAULT);
    4.16  }
     5.1 --- a/xen/include/public/arch-ia64.h	Wed Jul 05 10:03:20 2006 -0600
     5.2 +++ b/xen/include/public/arch-ia64.h	Wed Jul 05 10:23:54 2006 -0600
     5.3 @@ -160,7 +160,7 @@ struct cpu_user_regs {
     5.4      unsigned long r6;  /* preserved */
     5.5      unsigned long r7;  /* preserved */
     5.6      unsigned long eml_unat;    /* used for emulating instruction */
     5.7 -    unsigned long rfi_pfs;     /* used for elulating rfi */
     5.8 +    unsigned long pad0;     /* alignment pad */
     5.9  
    5.10  };
    5.11  typedef struct cpu_user_regs cpu_user_regs_t;