direct-io.hg

changeset 8033:26b961b72153

Fix the issue of on x86_64, rhel4 can not get into runlevel 5.
Xserver will scan pci and the cirrus VGA driver will register
mmio each time, cause mmio array out of space.

Signed-off-by: Xiaofeng Ling <xiaofeng.ling@intel.com>
author kaf24@firebug.cl.cam.ac.uk
date Fri Nov 25 09:17:34 2005 +0100 (2005-11-25)
parents a8ac8be1a889
children 9c81a3c5b33b
files tools/ioemu/exec.c
line diff
     1.1 --- a/tools/ioemu/exec.c	Fri Nov 25 09:15:08 2005 +0100
     1.2 +++ b/tools/ioemu/exec.c	Fri Nov 25 09:17:34 2005 +0100
     1.3 @@ -262,13 +262,24 @@ void cpu_register_physical_memory(target
     1.4                                    unsigned long size,
     1.5                                    unsigned long phys_offset)
     1.6  {
     1.7 -        if (mmio_cnt == MAX_MMIO) {
     1.8 -                fprintf(logfile, "too many mmio regions\n");
     1.9 -                exit(-1);
    1.10 +    int i;
    1.11 +
    1.12 +    for (i = 0; i < mmio_cnt; i++) { 
    1.13 +        if(mmio[i].start == start_addr) {
    1.14 +            mmio[i].io_index = phys_offset;
    1.15 +            mmio[i].size = size;
    1.16 +            return;
    1.17          }
    1.18 -        mmio[mmio_cnt].io_index = phys_offset;
    1.19 -        mmio[mmio_cnt].start = start_addr;
    1.20 -        mmio[mmio_cnt++].size = size;
    1.21 +    }
    1.22 +
    1.23 +    if (mmio_cnt == MAX_MMIO) {
    1.24 +        fprintf(logfile, "too many mmio regions\n");
    1.25 +        exit(-1);
    1.26 +    }
    1.27 +
    1.28 +    mmio[mmio_cnt].io_index = phys_offset;
    1.29 +    mmio[mmio_cnt].start = start_addr;
    1.30 +    mmio[mmio_cnt++].size = size;
    1.31  }
    1.32  
    1.33  /* mem_read and mem_write are arrays of functions containing the