direct-io.hg

changeset 8373:237b2a4d2499

Merged.
author emellor@leeni.uk.xensource.com
date Thu Dec 15 13:49:19 2005 +0000 (2005-12-15)
parents d8c7f144ca54 dc8122d90670
children bbe553187504
files
line diff
     1.1 --- a/linux-2.6-xen-sparse/drivers/xen/console/console.c	Thu Dec 15 13:49:07 2005 +0000
     1.2 +++ b/linux-2.6-xen-sparse/drivers/xen/console/console.c	Thu Dec 15 13:49:19 2005 +0000
     1.3 @@ -628,6 +628,7 @@ static int __init xencons_init(void)
     1.4  	if (xencons_driver == NULL)
     1.5  		return -ENOMEM;
     1.6  
     1.7 +	DRV(xencons_driver)->name            = "xencons";
     1.8  	DRV(xencons_driver)->major           = TTY_MAJOR;
     1.9  	DRV(xencons_driver)->type            = TTY_DRIVER_TYPE_SERIAL;
    1.10  	DRV(xencons_driver)->subtype         = SERIAL_TYPE_NORMAL;
     2.1 --- a/xen/arch/ia64/vmx/vlsapic.c	Thu Dec 15 13:49:07 2005 +0000
     2.2 +++ b/xen/arch/ia64/vmx/vlsapic.c	Thu Dec 15 13:49:19 2005 +0000
     2.3 @@ -476,19 +476,20 @@ static int irq_masked(VCPU *vcpu, int h_
     2.4   * May come from virtualization fault or
     2.5   * nested host interrupt.
     2.6   */
     2.7 -void vmx_vcpu_pend_interrupt(VCPU *vcpu, UINT64 vector)
     2.8 +int vmx_vcpu_pend_interrupt(VCPU *vcpu, uint8_t vector)
     2.9  {
    2.10      uint64_t    spsr;
    2.11 +    int ret;
    2.12  
    2.13      if (vector & ~0xff) {
    2.14          DPRINTK("vmx_vcpu_pend_interrupt: bad vector\n");
    2.15          return;
    2.16      }
    2.17      local_irq_save(spsr);
    2.18 -    VCPU(vcpu,irr[vector>>6]) |= 1UL<<(vector&63);
    2.19 -    //vlapic_update_shared_irr(vcpu);
    2.20 +    ret = test_and_set_bit(vector, &VCPU(vcpu, irr[0]));
    2.21      local_irq_restore(spsr);
    2.22      vcpu->arch.irq_new_pending = 1;
    2.23 +    return ret;
    2.24  }
    2.25  
    2.26  /*
    2.27 @@ -505,7 +506,6 @@ void vmx_vcpu_pend_batch_interrupt(VCPU 
    2.28      for (i=0 ; i<4; i++ ) {
    2.29          VCPU(vcpu,irr[i]) |= pend_irr[i];
    2.30      }
    2.31 -    //vlapic_update_shared_irr(vcpu);
    2.32      local_irq_restore(spsr);
    2.33      vcpu->arch.irq_new_pending = 1;
    2.34  }
    2.35 @@ -592,7 +592,6 @@ uint64_t guest_read_vivr(VCPU *vcpu)
    2.36      VLSAPIC_INSVC(vcpu,vec>>6) |= (1UL <<(vec&63));
    2.37      VCPU(vcpu, irr[vec>>6]) &= ~(1UL <<(vec&63));
    2.38      update_vhpi(vcpu, NULL_VECTOR);     // clear VHPI till EOI or IRR write
    2.39 -    //vlapic_update_shared_irr(vcpu);
    2.40      local_irq_restore(spsr);
    2.41      return (uint64_t)vec;
    2.42  }
     3.1 --- a/xen/arch/x86/dm/vmx_vioapic.c	Thu Dec 15 13:49:07 2005 +0000
     3.2 +++ b/xen/arch/x86/dm/vmx_vioapic.c	Thu Dec 15 13:49:19 2005 +0000
     3.3 @@ -306,14 +306,8 @@ static int ioapic_inj_irq(vmx_vioapic_t 
     3.4      switch (delivery_mode) {
     3.5      case VLAPIC_DELIV_MODE_FIXED:
     3.6      case VLAPIC_DELIV_MODE_LPRI:
     3.7 -        if (test_and_set_bit(vector, &VLAPIC_IRR(target)) && trig_mode == 1) {
     3.8 -            /* the level interrupt should not happen before it is cleard */
     3.9 +        if (vlapic_set_irq(target, vector, trig_mode) && (trig_mode == 1))
    3.10              printk("<ioapic_inj_irq> level interrupt happen before cleard\n");
    3.11 -        }
    3.12 -#ifndef __ia64__
    3.13 -        if (trig_mode)
    3.14 -            test_and_set_bit(vector, &target->tmr[0]);
    3.15 -#endif
    3.16          result = 1;
    3.17          break;
    3.18      default:
     4.1 --- a/xen/arch/x86/vmx.c	Thu Dec 15 13:49:07 2005 +0000
     4.2 +++ b/xen/arch/x86/vmx.c	Thu Dec 15 13:49:19 2005 +0000
     4.3 @@ -503,6 +503,8 @@ static void vmx_do_no_device_fault(void)
     4.4      __vm_clear_bit(EXCEPTION_BITMAP, EXCEPTION_BITMAP_NM);
     4.5  }
     4.6  
     4.7 +/* Reserved bits: [31:15], [12:11], [9], [6], [2:1] */
     4.8 +#define VMX_VCPU_CPUID_L1_RESERVED 0xffff9a46 
     4.9  
    4.10  static void vmx_vmexit_do_cpuid(unsigned long input, struct cpu_user_regs *regs)
    4.11  {
    4.12 @@ -537,6 +539,7 @@ static void vmx_vmexit_do_cpuid(unsigned
    4.13          }
    4.14  
    4.15          /* Unsupportable for virtualised CPUs. */
    4.16 +        ecx &= ~VMX_VCPU_CPUID_L1_RESERVED; /* mask off reserved bits */
    4.17          clear_bit(X86_FEATURE_VMXE & 31, &ecx);
    4.18          clear_bit(X86_FEATURE_MWAIT & 31, &ecx);
    4.19      }
    4.20 @@ -1091,11 +1094,21 @@ static int vmx_set_cr0(unsigned long val
    4.21      unsigned long eip;
    4.22      int paging_enabled;
    4.23      unsigned long vm_entry_value;
    4.24 +    unsigned long old_cr0;
    4.25  
    4.26      /*
    4.27       * CR0: We don't want to lose PE and PG.
    4.28       */
    4.29 -    paging_enabled = vmx_paging_enabled(v);
    4.30 +    __vmread_vcpu(v, CR0_READ_SHADOW, &old_cr0);
    4.31 +    paging_enabled = (old_cr0 & X86_CR0_PE) && (old_cr0 & X86_CR0_PG);
    4.32 +    /* If OS don't use clts to clear TS bit...*/
    4.33 +    if((old_cr0 & X86_CR0_TS) && !(value & X86_CR0_TS))
    4.34 +    {
    4.35 +            clts();
    4.36 +            setup_fpu(v);
    4.37 +    }
    4.38 +
    4.39 +
    4.40      __vmwrite(GUEST_CR0, value | X86_CR0_PE | X86_CR0_PG | X86_CR0_NE);
    4.41      __vmwrite(CR0_READ_SHADOW, value);
    4.42  
     5.1 --- a/xen/include/asm-ia64/vmx_platform.h	Thu Dec 15 13:49:07 2005 +0000
     5.2 +++ b/xen/include/asm-ia64/vmx_platform.h	Thu Dec 15 13:49:19 2005 +0000
     5.3 @@ -55,6 +55,12 @@ extern uint64_t dummy_tmr[];
     5.4  #define VLAPIC_ID(l) (uint16_t)(VCPU((l)->vcpu, lid) >> 16)
     5.5  #define VLAPIC_IRR(l) VCPU((l)->vcpu, irr[0])
     5.6  
     5.7 +extern int vmx_vcpu_pend_interrupt(struct vcpu *vcpu, uint8_t vector);
     5.8 +static inline int vlapic_set_irq(struct vlapic *t, uint8_t vec, uint8_t trig)
     5.9 +{
    5.10 +    return vmx_vcpu_pend_interrupt(t->vcpu, vec);
    5.11 +}
    5.12 +
    5.13  /* As long as we register vlsapic to ioapic controller, it's said enabled */
    5.14  #define vlapic_enabled(l) 1
    5.15  #define vmx_apic_support(d) 1
     6.1 --- a/xen/include/asm-ia64/vmx_vcpu.h	Thu Dec 15 13:49:07 2005 +0000
     6.2 +++ b/xen/include/asm-ia64/vmx_vcpu.h	Thu Dec 15 13:49:19 2005 +0000
     6.3 @@ -112,7 +112,7 @@ extern int vmx_check_pending_irq(VCPU *v
     6.4  extern void guest_write_eoi(VCPU *vcpu);
     6.5  extern uint64_t guest_read_vivr(VCPU *vcpu);
     6.6  extern void vmx_inject_vhpi(VCPU *vcpu, u8 vec);
     6.7 -extern void vmx_vcpu_pend_interrupt(VCPU *vcpu, UINT64 vector);
     6.8 +extern int vmx_vcpu_pend_interrupt(VCPU *vcpu, uint8_t vector);
     6.9  extern struct virutal_platform_def *vmx_vcpu_get_plat(VCPU *vcpu);
    6.10  extern void memread_p(VCPU *vcpu, u64 *src, u64 *dest, size_t s);
    6.11  extern void memread_v(VCPU *vcpu, thash_data_t *vtlb, u64 *src, u64 *dest, size_t s);
    6.12 @@ -474,4 +474,7 @@ vmx_vrrtomrr(VCPU *v, unsigned long val)
    6.13  #endif 
    6.14  
    6.15  }
    6.16 +
    6.17 +#define check_work_pending(v)	\
    6.18 +    (event_pending((v)) || ((v)->arch.irq_new_pending))
    6.19  #endif
     7.1 --- a/xen/include/asm-x86/vmx_vlapic.h	Thu Dec 15 13:49:07 2005 +0000
     7.2 +++ b/xen/include/asm-x86/vmx_vlapic.h	Thu Dec 15 13:49:19 2005 +0000
     7.3 @@ -202,6 +202,18 @@ struct vlapic
     7.4      struct domain      *domain;
     7.5  };
     7.6  
     7.7 +static inline int vlapic_set_irq(struct vlapic *t, uint8_t vec, uint8_t trig)
     7.8 +{
     7.9 +    int ret;
    7.10 +
    7.11 +    ret = test_and_set_bit(vec, &t->irr[0]);
    7.12 +    if (trig)
    7.13 +	test_and_set_bit(vec, &t->tmr[0]);
    7.14 +
    7.15 +    /* We may need to wake up target vcpu, besides set pending bit here */
    7.16 +    return ret;
    7.17 +}
    7.18 +
    7.19  static inline int  vlapic_timer_active(struct vlapic *vlapic)
    7.20  {
    7.21      return  active_ac_timer(&(vlapic->vlapic_timer));