direct-io.hg

changeset 14142:1c5e6239a8d0

fix PDPE entry in P2M table under 32bit PAE hypervisor
author root@xenhog02.amd.com
date Sun Feb 25 23:58:33 2007 -0600 (2007-02-25)
parents c2e7bacf0919
children 8bd56d9cc6c7
files xen/arch/x86/mm/p2m.c
line diff
     1.1 --- a/xen/arch/x86/mm/p2m.c	Tue Feb 27 01:52:27 2007 +0000
     1.2 +++ b/xen/arch/x86/mm/p2m.c	Sun Feb 25 23:58:33 2007 -0600
     1.3 @@ -145,6 +145,10 @@ p2m_next_level(struct domain *d, mfn_t *
     1.4              paging_write_p2m_entry(d, gfn, p2m_entry, new_entry, 4);
     1.5              break;
     1.6          case PGT_l2_page_table:
     1.7 +#if CONFIG_PAGING_LEVELS == 3
     1.8 +            /* for PAE mode, PDPE only has PCD/PWT/P bits available */
     1.9 +            new_entry = l1e_from_pfn(mfn_x(page_to_mfn(pg)), _PAGE_PRESENT);
    1.10 +#endif
    1.11              paging_write_p2m_entry(d, gfn, p2m_entry, new_entry, 3);
    1.12              break;
    1.13          case PGT_l1_page_table: