direct-io.hg

changeset 5455:188c610ed5c6

bitkeeper revision 1.1709.1.7 (42af1a85T412eQfXEME3Z3XLDYOmWg)

XEN/VTI utilizes a PMT table to describe physical->machine
mapping info, instead of 3 level page tables from Linux.
Attached patch adds some necessary macro/interface/definitions
about that structure. Some stuff is added to public directory,
because control panel needs to use those info to construct domain.

Signed-off-by Kevin Tian <Kevin.tian@intel.com>
author djm@kirby.fc.hp.com
date Tue Jun 14 17:57:25 2005 +0000 (2005-06-14)
parents 9947f23ecc75
children fbb0e9caca09
files xen/arch/ia64/xenmem.c xen/include/asm-ia64/domain.h xen/include/asm-ia64/mm.h xen/include/asm-ia64/vmx_vpd.h xen/include/public/arch-ia64.h
line diff
     1.1 --- a/xen/arch/ia64/xenmem.c	Tue Jun 14 17:48:48 2005 +0000
     1.2 +++ b/xen/arch/ia64/xenmem.c	Tue Jun 14 17:57:25 2005 +0000
     1.3 @@ -52,7 +52,7 @@ paging_init (void)
     1.4  		panic("Not enough memory to bootstrap Xen.\n");
     1.5  
     1.6  	printk("machine to physical table: 0x%lx\n", (u64)mpt_table);
     1.7 -	memset(mpt_table, 0x55, mpt_table_size);
     1.8 +	memset(mpt_table, INVALID_M2P_ENTRY, mpt_table_size);
     1.9  
    1.10  	/* Any more setup here? On VMX enabled platform,
    1.11  	 * there's no need to keep guest linear pg table,
     2.1 --- a/xen/include/asm-ia64/domain.h	Tue Jun 14 17:48:48 2005 +0000
     2.2 +++ b/xen/include/asm-ia64/domain.h	Tue Jun 14 17:57:25 2005 +0000
     2.3 @@ -6,6 +6,7 @@
     2.4  #include <asm/vmx_vpd.h>
     2.5  #include <asm/vmmu.h>
     2.6  #include <asm/regionreg.h>
     2.7 +#include <public/arch-ia64.h>
     2.8  #endif // CONFIG_VTI
     2.9  #include <xen/list.h>
    2.10  
    2.11 @@ -33,7 +34,15 @@ struct arch_domain {
    2.12      int imp_va_msb;
    2.13      ia64_rr emul_phy_rr0;
    2.14      ia64_rr emul_phy_rr4;
    2.15 -    u64 *pmt;	/* physical to machine table */
    2.16 +    unsigned long *pmt;	/* physical to machine table */
    2.17 +    /*
    2.18 +     * max_pfn is the maximum page frame in guest physical space, including
    2.19 +     * inter-middle I/O ranges and memory holes. This is different with
    2.20 +     * max_pages in domain struct, which indicates maximum memory size
    2.21 +     */
    2.22 +    unsigned long max_pfn;
    2.23 +    unsigned int section_nr;
    2.24 +    mm_section_t *sections;	/* Describe memory hole except for Dom0 */
    2.25  #endif  //CONFIG_VTI
    2.26      u64 xen_vastart;
    2.27      u64 xen_vaend;
     3.1 --- a/xen/include/asm-ia64/mm.h	Tue Jun 14 17:48:48 2005 +0000
     3.2 +++ b/xen/include/asm-ia64/mm.h	Tue Jun 14 17:57:25 2005 +0000
     3.3 @@ -375,17 +375,40 @@ extern unsigned long *mpt_table;
     3.4  #undef machine_to_phys_mapping
     3.5  #define machine_to_phys_mapping	mpt_table
     3.6  
     3.7 +#define INVALID_M2P_ENTRY        (~0U)
     3.8 +#define VALID_M2P(_e)            (!((_e) & (1U<<63)))
     3.9 +#define IS_INVALID_M2P_ENTRY(_e) (!VALID_M2P(_e))
    3.10  /* If pmt table is provided by control pannel later, we need __get_user
    3.11  * here. However if it's allocated by HV, we should access it directly
    3.12  */
    3.13 -#define phys_to_machine_mapping(d, gpfn)	\
    3.14 -    ((d) == dom0 ? gpfn : (d)->arch.pmt[(gpfn)])
    3.15 +#define phys_to_machine_mapping(d, gpfn)			\
    3.16 +    ((d) == dom0 ? gpfn : 					\
    3.17 +	(gpfn <= d->arch.max_pfn ? (d)->arch.pmt[(gpfn)] :	\
    3.18 +		INVALID_MFN))
    3.19  
    3.20  #define __mfn_to_gpfn(_d, mfn)			\
    3.21      machine_to_phys_mapping[(mfn)]
    3.22  
    3.23  #define __gpfn_to_mfn(_d, gpfn)			\
    3.24      phys_to_machine_mapping((_d), (gpfn))
    3.25 +
    3.26 +#define __gpfn_invalid(_d, gpfn)			\
    3.27 +	(__gpfn_to_mfn((_d), (gpfn)) & GPFN_INV_MASK)
    3.28 +
    3.29 +#define __gpfn_valid(_d, gpfn)	!__gpfn_invalid(_d, gpfn)
    3.30 +
    3.31 +/* Return I/O type if trye */
    3.32 +#define __gpfn_is_io(_d, gpfn)				\
    3.33 +	(__gpfn_valid(_d, gpfn) ? 			\
    3.34 +	(__gpfn_to_mfn((_d), (gpfn)) & GPFN_IO_MASK) : 0)
    3.35 +
    3.36 +#define __gpfn_is_mem(_d, gpfn)				\
    3.37 +	(__gpfn_valid(_d, gpfn) ?			\
    3.38 +	((__gpfn_to_mfn((_d), (gpfn)) & GPFN_IO_MASK) == GPFN_MEM) : 0)
    3.39 +
    3.40 +
    3.41 +#define __gpa_to_mpa(_d, gpa)   \
    3.42 +    ((__gpfn_to_mfn((_d),(gpa)>>PAGE_SHIFT)<<PAGE_SHIFT)|((gpa)&~PAGE_MASK))
    3.43  #endif // CONFIG_VTI
    3.44  
    3.45  #endif /* __ASM_IA64_MM_H__ */
     4.1 --- a/xen/include/asm-ia64/vmx_vpd.h	Tue Jun 14 17:48:48 2005 +0000
     4.2 +++ b/xen/include/asm-ia64/vmx_vpd.h	Tue Jun 14 17:57:25 2005 +0000
     4.3 @@ -26,6 +26,7 @@
     4.4  
     4.5  #include <asm/vtm.h>
     4.6  #include <asm/vmx_platform.h>
     4.7 +#include <public/arch-ia64.h>
     4.8  
     4.9  #define VPD_SHIFT	17	/* 128K requirement */
    4.10  #define VPD_SIZE	(1 << VPD_SHIFT)
     5.1 --- a/xen/include/public/arch-ia64.h	Tue Jun 14 17:48:48 2005 +0000
     5.2 +++ b/xen/include/public/arch-ia64.h	Tue Jun 14 17:57:25 2005 +0000
     5.3 @@ -19,6 +19,32 @@
     5.4  /* NB. Both the following are 64 bits each. */
     5.5  typedef unsigned long memory_t;   /* Full-sized pointer/address/memory-size. */
     5.6  
     5.7 +#define MAX_NR_SECTION  32  // at most 32 memory holes
     5.8 +typedef struct {
     5.9 +    unsigned long	start; 	/* start of memory hole */
    5.10 +    unsigned long	end;	/* end of memory hole */
    5.11 +} mm_section_t;
    5.12 +
    5.13 +typedef struct {
    5.14 +    unsigned long	mfn : 56;
    5.15 +    unsigned long	type: 8;
    5.16 +} pmt_entry_t;
    5.17 +
    5.18 +#define GPFN_MEM		(0UL << 56)	/* Guest pfn is normal mem */
    5.19 +#define GPFN_FRAME_BUFFER	(1UL << 56)	/* VGA framebuffer */
    5.20 +#define GPFN_LOW_MMIO		(2UL << 56)	/* Low MMIO range */
    5.21 +#define GPFN_PIB		(3UL << 56)	/* PIB base */
    5.22 +#define GPFN_IOSAPIC		(4UL << 56)	/* IOSAPIC base */
    5.23 +#define GPFN_LEGACY_IO		(5UL << 56)	/* Legacy I/O base */
    5.24 +#define GPFN_GFW		(6UL << 56)	/* Guest Firmware */
    5.25 +#define GPFN_HIGH_MMIO		(7UL << 56)	/* High MMIO range */
    5.26 +
    5.27 +#define GPFN_IO_MASK		(7UL << 56)	/* Guest pfn is I/O type */
    5.28 +#define GPFN_INV_MASK		(31UL << 59)	/* Guest pfn is invalid */
    5.29 +
    5.30 +#define INVALID_MFN              (~0UL)
    5.31 +
    5.32 +
    5.33  typedef struct
    5.34  {
    5.35  } PACKED cpu_user_regs;