direct-io.hg

changeset 10420:08378b83ea1e

[IA64] cleanup

Disable a privify path.
Cleanup: warnings and static.

Signed-off-by: Tristan Gingold <tristan.gingold@bull.net>
author awilliam@xenbuild.aw
date Fri Jun 16 09:06:40 2006 -0600 (2006-06-16)
parents fbc0e953732e
children 81d35c0d964f
files xen/arch/ia64/linux-xen/time.c xen/arch/ia64/vmx/vmmu.c xen/arch/ia64/xen/faults.c xen/arch/ia64/xen/privop.c xen/include/asm-ia64/config.h
line diff
     1.1 --- a/xen/arch/ia64/linux-xen/time.c	Thu Jun 15 10:23:57 2006 -0600
     1.2 +++ b/xen/arch/ia64/linux-xen/time.c	Fri Jun 16 09:06:40 2006 -0600
     1.3 @@ -204,7 +204,12 @@ ia64_init_itm (void)
     1.4  	printk(KERN_DEBUG "CPU %d: base freq=%lu.%03luMHz, ITC ratio=%lu/%lu, "
     1.5  	       "ITC freq=%lu.%03luMHz", smp_processor_id(),
     1.6  	       platform_base_freq / 1000000, (platform_base_freq / 1000) % 1000,
     1.7 +#ifdef XEN
     1.8 +	       (u64)itc_ratio.num, (u64)itc_ratio.den,
     1.9 +	       itc_freq / 1000000, (itc_freq / 1000) % 1000);
    1.10 +#else
    1.11  	       itc_ratio.num, itc_ratio.den, itc_freq / 1000000, (itc_freq / 1000) % 1000);
    1.12 +#endif
    1.13  
    1.14  	if (platform_base_drift != -1) {
    1.15  		itc_drift = platform_base_drift*itc_ratio.num/itc_ratio.den;
     2.1 --- a/xen/arch/ia64/vmx/vmmu.c	Thu Jun 15 10:23:57 2006 -0600
     2.2 +++ b/xen/arch/ia64/vmx/vmmu.c	Fri Jun 16 09:06:40 2006 -0600
     2.3 @@ -504,16 +504,18 @@ struct ptc_ga_args {
     2.4  static void ptc_ga_remote_func (void *varg)
     2.5  {
     2.6      u64 oldrid, moldrid;
     2.7 -    VCPU *v;
     2.8      struct ptc_ga_args *args = (struct ptc_ga_args *)varg;
     2.9 -    v = args->vcpu;
    2.10 +    VCPU *v = args->vcpu;
    2.11 +
    2.12      oldrid = VMX(v, vrr[0]);
    2.13      VMX(v, vrr[0]) = args->rid;
    2.14      moldrid = ia64_get_rr(0x0);
    2.15      ia64_set_rr(0x0,vrrtomrr(v,args->rid));
    2.16 +    ia64_srlz_d();
    2.17      vmx_vcpu_ptc_l(v, args->vadr, args->ps);
    2.18      VMX(v, vrr[0]) = oldrid; 
    2.19      ia64_set_rr(0x0,moldrid);
    2.20 +    ia64_dv_serialize_data();
    2.21  }
    2.22  
    2.23  
     3.1 --- a/xen/arch/ia64/xen/faults.c	Thu Jun 15 10:23:57 2006 -0600
     3.2 +++ b/xen/arch/ia64/xen/faults.c	Fri Jun 16 09:06:40 2006 -0600
     3.3 @@ -372,14 +372,16 @@ ia64_fault (unsigned long vector, unsign
     3.4  {
     3.5  	struct pt_regs *regs = (struct pt_regs *) &stack;
     3.6  	unsigned long code;
     3.7 -	static const char *reason[] = {
     3.8 +	static const char * const reason[] = {
     3.9  		"IA-64 Illegal Operation fault",
    3.10  		"IA-64 Privileged Operation fault",
    3.11  		"IA-64 Privileged Register fault",
    3.12  		"IA-64 Reserved Register/Field fault",
    3.13  		"Disabled Instruction Set Transition fault",
    3.14 -		"Unknown fault 5", "Unknown fault 6", "Unknown fault 7", "Illegal Hazard fault",
    3.15 -		"Unknown fault 9", "Unknown fault 10", "Unknown fault 11", "Unknown fault 12",
    3.16 +		"Unknown fault 5", "Unknown fault 6",
    3.17 +		"Unknown fault 7", "Illegal Hazard fault",
    3.18 +		"Unknown fault 9", "Unknown fault 10",
    3.19 +		"Unknown fault 11", "Unknown fault 12",
    3.20  		"Unknown fault 13", "Unknown fault 14", "Unknown fault 15"
    3.21  	};
    3.22  
    3.23 @@ -566,10 +568,6 @@ ia64_handle_privop (unsigned long ifa, s
    3.24  	}
    3.25  }
    3.26  
    3.27 -/* Used in vhpt.h.  */
    3.28 -#define INTR_TYPE_MAX	10
    3.29 -UINT64 int_counts[INTR_TYPE_MAX];
    3.30 -
    3.31  void
    3.32  ia64_handle_reflection (unsigned long ifa, struct pt_regs *regs, unsigned long isr, unsigned long iim, unsigned long vector)
    3.33  {
    3.34 @@ -578,7 +576,7 @@ ia64_handle_reflection (unsigned long if
    3.35  	unsigned long psr = regs->cr_ipsr;
    3.36  
    3.37  	/* Following faults shouldn'g be seen from Xen itself */
    3.38 -	if (!(psr & IA64_PSR_CPL)) BUG();
    3.39 +	BUG_ON (!(psr & IA64_PSR_CPL));
    3.40  
    3.41  	switch(vector) {
    3.42  	    case 8:
    3.43 @@ -601,6 +599,7 @@ ia64_handle_reflection (unsigned long if
    3.44  		break;
    3.45  	    case 26:
    3.46  		if (((isr >> 4L) & 0xfL) == 1) {
    3.47 +			/* Fault is due to a register NaT consumption fault. */
    3.48  			//regs->eml_unat = 0;  FIXME: DO WE NEED THIS??
    3.49  			printf("ia64_handle_reflection: handling regNaT fault\n");
    3.50  			vector = IA64_NAT_CONSUMPTION_VECTOR; break;
    3.51 @@ -612,6 +611,9 @@ ia64_handle_reflection (unsigned long if
    3.52  			vector = IA64_NAT_CONSUMPTION_VECTOR; break;
    3.53  		}
    3.54  #endif
    3.55 +#ifdef CONFIG_PRIVIFY
    3.56 +		/* Some privified operations are coded using reg+64 instead
    3.57 +		   of reg.  */
    3.58  		printf("*** NaT fault... attempting to handle as privop\n");
    3.59  		printf("isr=%016lx, ifa=%016lx, iip=%016lx, ipsr=%016lx\n",
    3.60  		       isr, ifa, regs->cr_iip, psr);
    3.61 @@ -622,6 +624,7 @@ ia64_handle_reflection (unsigned long if
    3.62  			printf("*** Handled privop masquerading as NaT fault\n");
    3.63  			return;
    3.64  		}
    3.65 +#endif
    3.66  		vector = IA64_NAT_CONSUMPTION_VECTOR; break;
    3.67  	    case 27:
    3.68  		//printf("*** Handled speculation vector, itc=%lx!\n",ia64_get_itc());
     4.1 --- a/xen/arch/ia64/xen/privop.c	Thu Jun 15 10:23:57 2006 -0600
     4.2 +++ b/xen/arch/ia64/xen/privop.c	Fri Jun 16 09:06:40 2006 -0600
     4.3 @@ -12,7 +12,6 @@
     4.4  #include <asm/delay.h>	// Debug only
     4.5  #include <asm/dom_fw.h>
     4.6  #include <asm/vhpt.h>
     4.7 -//#include <debug.h>
     4.8  
     4.9  /* FIXME: where these declarations should be there ? */
    4.10  extern int dump_reflect_counts(char *);
    4.11 @@ -21,13 +20,16 @@ extern void zero_reflect_counts(void);
    4.12  long priv_verbose=0;
    4.13  
    4.14  /* Set to 1 to handle privified instructions from the privify tool. */
    4.15 +#ifndef CONFIG_PRIVIFY
    4.16  static const int privify_en = 0;
    4.17 +#else
    4.18 +static const int privify_en = 1;
    4.19 +#endif
    4.20  
    4.21  /**************************************************************************
    4.22  Hypercall bundle creation
    4.23  **************************************************************************/
    4.24  
    4.25 -
    4.26  void build_hypercall_bundle(UINT64 *imva, UINT64 brkimm, UINT64 hypnum, UINT64 ret)
    4.27  {
    4.28  	INST64_A5 slot0;
    4.29 @@ -106,27 +108,27 @@ void build_pal_hypercall_bundles(UINT64 
    4.30  Privileged operation emulation routines
    4.31  **************************************************************************/
    4.32  
    4.33 -IA64FAULT priv_rfi(VCPU *vcpu, INST64 inst)
    4.34 +static IA64FAULT priv_rfi(VCPU *vcpu, INST64 inst)
    4.35  {
    4.36  	return vcpu_rfi(vcpu);
    4.37  }
    4.38  
    4.39 -IA64FAULT priv_bsw0(VCPU *vcpu, INST64 inst)
    4.40 +static IA64FAULT priv_bsw0(VCPU *vcpu, INST64 inst)
    4.41  {
    4.42  	return vcpu_bsw0(vcpu);
    4.43  }
    4.44  
    4.45 -IA64FAULT priv_bsw1(VCPU *vcpu, INST64 inst)
    4.46 +static IA64FAULT priv_bsw1(VCPU *vcpu, INST64 inst)
    4.47  {
    4.48  	return vcpu_bsw1(vcpu);
    4.49  }
    4.50  
    4.51 -IA64FAULT priv_cover(VCPU *vcpu, INST64 inst)
    4.52 +static IA64FAULT priv_cover(VCPU *vcpu, INST64 inst)
    4.53  {
    4.54  	return vcpu_cover(vcpu);
    4.55  }
    4.56  
    4.57 -IA64FAULT priv_ptc_l(VCPU *vcpu, INST64 inst)
    4.58 +static IA64FAULT priv_ptc_l(VCPU *vcpu, INST64 inst)
    4.59  {
    4.60  	UINT64 vadr = vcpu_get_gr(vcpu,inst.M45.r3);
    4.61  	UINT64 log_range;
    4.62 @@ -135,7 +137,7 @@ IA64FAULT priv_ptc_l(VCPU *vcpu, INST64 
    4.63  	return vcpu_ptc_l(vcpu,vadr,log_range);
    4.64  }
    4.65  
    4.66 -IA64FAULT priv_ptc_e(VCPU *vcpu, INST64 inst)
    4.67 +static IA64FAULT priv_ptc_e(VCPU *vcpu, INST64 inst)
    4.68  {
    4.69  	UINT src = inst.M28.r3;
    4.70  
    4.71 @@ -145,7 +147,7 @@ IA64FAULT priv_ptc_e(VCPU *vcpu, INST64 
    4.72  	return vcpu_ptc_e(vcpu,vcpu_get_gr(vcpu,src));
    4.73  }
    4.74  
    4.75 -IA64FAULT priv_ptc_g(VCPU *vcpu, INST64 inst)
    4.76 +static IA64FAULT priv_ptc_g(VCPU *vcpu, INST64 inst)
    4.77  {
    4.78  	UINT64 vadr = vcpu_get_gr(vcpu,inst.M45.r3);
    4.79  	UINT64 addr_range;
    4.80 @@ -154,7 +156,7 @@ IA64FAULT priv_ptc_g(VCPU *vcpu, INST64 
    4.81  	return vcpu_ptc_g(vcpu,vadr,addr_range);
    4.82  }
    4.83  
    4.84 -IA64FAULT priv_ptc_ga(VCPU *vcpu, INST64 inst)
    4.85 +static IA64FAULT priv_ptc_ga(VCPU *vcpu, INST64 inst)
    4.86  {
    4.87  	UINT64 vadr = vcpu_get_gr(vcpu,inst.M45.r3);
    4.88  	UINT64 addr_range;
    4.89 @@ -163,7 +165,7 @@ IA64FAULT priv_ptc_ga(VCPU *vcpu, INST64
    4.90  	return vcpu_ptc_ga(vcpu,vadr,addr_range);
    4.91  }
    4.92  
    4.93 -IA64FAULT priv_ptr_d(VCPU *vcpu, INST64 inst)
    4.94 +static IA64FAULT priv_ptr_d(VCPU *vcpu, INST64 inst)
    4.95  {
    4.96  	UINT64 vadr = vcpu_get_gr(vcpu,inst.M45.r3);
    4.97  	UINT64 log_range;
    4.98 @@ -172,7 +174,7 @@ IA64FAULT priv_ptr_d(VCPU *vcpu, INST64 
    4.99  	return vcpu_ptr_d(vcpu,vadr,log_range);
   4.100  }
   4.101  
   4.102 -IA64FAULT priv_ptr_i(VCPU *vcpu, INST64 inst)
   4.103 +static IA64FAULT priv_ptr_i(VCPU *vcpu, INST64 inst)
   4.104  {
   4.105  	UINT64 vadr = vcpu_get_gr(vcpu,inst.M45.r3);
   4.106  	UINT64 log_range;
   4.107 @@ -181,7 +183,7 @@ IA64FAULT priv_ptr_i(VCPU *vcpu, INST64 
   4.108  	return vcpu_ptr_i(vcpu,vadr,log_range);
   4.109  }
   4.110  
   4.111 -IA64FAULT priv_tpa(VCPU *vcpu, INST64 inst)
   4.112 +static IA64FAULT priv_tpa(VCPU *vcpu, INST64 inst)
   4.113  {
   4.114  	UINT64 padr;
   4.115  	UINT fault;
   4.116 @@ -196,7 +198,7 @@ IA64FAULT priv_tpa(VCPU *vcpu, INST64 in
   4.117  	else return fault;
   4.118  }
   4.119  
   4.120 -IA64FAULT priv_tak(VCPU *vcpu, INST64 inst)
   4.121 +static IA64FAULT priv_tak(VCPU *vcpu, INST64 inst)
   4.122  {
   4.123  	UINT64 key;
   4.124  	UINT fault;
   4.125 @@ -215,7 +217,7 @@ IA64FAULT priv_tak(VCPU *vcpu, INST64 in
   4.126   * Insert translation register/cache
   4.127  ************************************/
   4.128  
   4.129 -IA64FAULT priv_itr_d(VCPU *vcpu, INST64 inst)
   4.130 +static IA64FAULT priv_itr_d(VCPU *vcpu, INST64 inst)
   4.131  {
   4.132  	UINT64 fault, itir, ifa, pte, slot;
   4.133  
   4.134 @@ -230,7 +232,7 @@ IA64FAULT priv_itr_d(VCPU *vcpu, INST64 
   4.135  	return (vcpu_itr_d(vcpu,slot,pte,itir,ifa));
   4.136  }
   4.137  
   4.138 -IA64FAULT priv_itr_i(VCPU *vcpu, INST64 inst)
   4.139 +static IA64FAULT priv_itr_i(VCPU *vcpu, INST64 inst)
   4.140  {
   4.141  	UINT64 fault, itir, ifa, pte, slot;
   4.142  
   4.143 @@ -245,7 +247,7 @@ IA64FAULT priv_itr_i(VCPU *vcpu, INST64 
   4.144  	return (vcpu_itr_i(vcpu,slot,pte,itir,ifa));
   4.145  }
   4.146  
   4.147 -IA64FAULT priv_itc_d(VCPU *vcpu, INST64 inst)
   4.148 +static IA64FAULT priv_itc_d(VCPU *vcpu, INST64 inst)
   4.149  {
   4.150  	UINT64 fault, itir, ifa, pte;
   4.151  
   4.152 @@ -259,7 +261,7 @@ IA64FAULT priv_itc_d(VCPU *vcpu, INST64 
   4.153  	return (vcpu_itc_d(vcpu,pte,itir,ifa));
   4.154  }
   4.155  
   4.156 -IA64FAULT priv_itc_i(VCPU *vcpu, INST64 inst)
   4.157 +static IA64FAULT priv_itc_i(VCPU *vcpu, INST64 inst)
   4.158  {
   4.159  	UINT64 fault, itir, ifa, pte;
   4.160  
   4.161 @@ -277,7 +279,7 @@ IA64FAULT priv_itc_i(VCPU *vcpu, INST64 
   4.162   * Moves to semi-privileged registers
   4.163  *************************************/
   4.164  
   4.165 -IA64FAULT priv_mov_to_ar_imm(VCPU *vcpu, INST64 inst)
   4.166 +static IA64FAULT priv_mov_to_ar_imm(VCPU *vcpu, INST64 inst)
   4.167  {
   4.168  	// I27 and M30 are identical for these fields
   4.169  	UINT64 ar3 = inst.M30.ar3;
   4.170 @@ -285,7 +287,7 @@ IA64FAULT priv_mov_to_ar_imm(VCPU *vcpu,
   4.171  	return (vcpu_set_ar(vcpu,ar3,imm));
   4.172  }
   4.173  
   4.174 -IA64FAULT priv_mov_to_ar_reg(VCPU *vcpu, INST64 inst)
   4.175 +static IA64FAULT priv_mov_to_ar_reg(VCPU *vcpu, INST64 inst)
   4.176  {
   4.177  	// I26 and M29 are identical for these fields
   4.178  	UINT64 ar3 = inst.M29.ar3;
   4.179 @@ -307,42 +309,42 @@ IA64FAULT priv_mov_to_ar_reg(VCPU *vcpu,
   4.180   * Moves to privileged registers
   4.181  ********************************/
   4.182  
   4.183 -IA64FAULT priv_mov_to_pkr(VCPU *vcpu, INST64 inst)
   4.184 +static IA64FAULT priv_mov_to_pkr(VCPU *vcpu, INST64 inst)
   4.185  {
   4.186  	UINT64 r3 = vcpu_get_gr(vcpu,inst.M42.r3);
   4.187  	UINT64 r2 = vcpu_get_gr(vcpu,inst.M42.r2);
   4.188  	return (vcpu_set_pkr(vcpu,r3,r2));
   4.189  }
   4.190  
   4.191 -IA64FAULT priv_mov_to_rr(VCPU *vcpu, INST64 inst)
   4.192 +static IA64FAULT priv_mov_to_rr(VCPU *vcpu, INST64 inst)
   4.193  {
   4.194  	UINT64 r3 = vcpu_get_gr(vcpu,inst.M42.r3);
   4.195  	UINT64 r2 = vcpu_get_gr(vcpu,inst.M42.r2);
   4.196  	return (vcpu_set_rr(vcpu,r3,r2));
   4.197  }
   4.198  
   4.199 -IA64FAULT priv_mov_to_dbr(VCPU *vcpu, INST64 inst)
   4.200 +static IA64FAULT priv_mov_to_dbr(VCPU *vcpu, INST64 inst)
   4.201  {
   4.202  	UINT64 r3 = vcpu_get_gr(vcpu,inst.M42.r3);
   4.203  	UINT64 r2 = vcpu_get_gr(vcpu,inst.M42.r2);
   4.204  	return (vcpu_set_dbr(vcpu,r3,r2));
   4.205  }
   4.206  
   4.207 -IA64FAULT priv_mov_to_ibr(VCPU *vcpu, INST64 inst)
   4.208 +static IA64FAULT priv_mov_to_ibr(VCPU *vcpu, INST64 inst)
   4.209  {
   4.210  	UINT64 r3 = vcpu_get_gr(vcpu,inst.M42.r3);
   4.211  	UINT64 r2 = vcpu_get_gr(vcpu,inst.M42.r2);
   4.212  	return (vcpu_set_ibr(vcpu,r3,r2));
   4.213  }
   4.214  
   4.215 -IA64FAULT priv_mov_to_pmc(VCPU *vcpu, INST64 inst)
   4.216 +static IA64FAULT priv_mov_to_pmc(VCPU *vcpu, INST64 inst)
   4.217  {
   4.218  	UINT64 r3 = vcpu_get_gr(vcpu,inst.M42.r3);
   4.219  	UINT64 r2 = vcpu_get_gr(vcpu,inst.M42.r2);
   4.220  	return (vcpu_set_pmc(vcpu,r3,r2));
   4.221  }
   4.222  
   4.223 -IA64FAULT priv_mov_to_pmd(VCPU *vcpu, INST64 inst)
   4.224 +static IA64FAULT priv_mov_to_pmd(VCPU *vcpu, INST64 inst)
   4.225  {
   4.226  	UINT64 r3 = vcpu_get_gr(vcpu,inst.M42.r3);
   4.227  	UINT64 r2 = vcpu_get_gr(vcpu,inst.M42.r2);
   4.228 @@ -351,7 +353,7 @@ IA64FAULT priv_mov_to_pmd(VCPU *vcpu, IN
   4.229  
   4.230  unsigned long to_cr_cnt[128] = { 0 };
   4.231  
   4.232 -IA64FAULT priv_mov_to_cr(VCPU *vcpu, INST64 inst)
   4.233 +static IA64FAULT priv_mov_to_cr(VCPU *vcpu, INST64 inst)
   4.234  {
   4.235  	UINT64 val = vcpu_get_gr(vcpu, inst.M32.r2);
   4.236  	to_cr_cnt[inst.M32.cr3]++;
   4.237 @@ -386,13 +388,13 @@ IA64FAULT priv_mov_to_cr(VCPU *vcpu, INS
   4.238  	}
   4.239  }
   4.240  
   4.241 -IA64FAULT priv_rsm(VCPU *vcpu, INST64 inst)
   4.242 +static IA64FAULT priv_rsm(VCPU *vcpu, INST64 inst)
   4.243  {
   4.244  	UINT64 imm24 = (inst.M44.i<<23)|(inst.M44.i2<<21)|inst.M44.imm;
   4.245  	return vcpu_reset_psr_sm(vcpu,imm24);
   4.246  }
   4.247  
   4.248 -IA64FAULT priv_ssm(VCPU *vcpu, INST64 inst)
   4.249 +static IA64FAULT priv_ssm(VCPU *vcpu, INST64 inst)
   4.250  {
   4.251  	UINT64 imm24 = (inst.M44.i<<23)|(inst.M44.i2<<21)|inst.M44.imm;
   4.252  	return vcpu_set_psr_sm(vcpu,imm24);
   4.253 @@ -401,7 +403,7 @@ IA64FAULT priv_ssm(VCPU *vcpu, INST64 in
   4.254  /**
   4.255   * @todo Check for reserved bits and return IA64_RSVDREG_FAULT.
   4.256   */
   4.257 -IA64FAULT priv_mov_to_psr(VCPU *vcpu, INST64 inst)
   4.258 +static IA64FAULT priv_mov_to_psr(VCPU *vcpu, INST64 inst)
   4.259  {
   4.260  	UINT64 val = vcpu_get_gr(vcpu, inst.M35.r2);
   4.261  	return vcpu_set_psr_l(vcpu,val);
   4.262 @@ -411,7 +413,7 @@ IA64FAULT priv_mov_to_psr(VCPU *vcpu, IN
   4.263   * Moves from privileged registers
   4.264   **********************************/
   4.265  
   4.266 -IA64FAULT priv_mov_from_rr(VCPU *vcpu, INST64 inst)
   4.267 +static IA64FAULT priv_mov_from_rr(VCPU *vcpu, INST64 inst)
   4.268  {
   4.269  	UINT64 val;
   4.270  	IA64FAULT fault;
   4.271 @@ -432,7 +434,7 @@ IA64FAULT priv_mov_from_rr(VCPU *vcpu, I
   4.272  	return fault;
   4.273  }
   4.274  
   4.275 -IA64FAULT priv_mov_from_pkr(VCPU *vcpu, INST64 inst)
   4.276 +static IA64FAULT priv_mov_from_pkr(VCPU *vcpu, INST64 inst)
   4.277  {
   4.278  	UINT64 val;
   4.279  	IA64FAULT fault;
   4.280 @@ -443,7 +445,7 @@ IA64FAULT priv_mov_from_pkr(VCPU *vcpu, 
   4.281  	else return fault;
   4.282  }
   4.283  
   4.284 -IA64FAULT priv_mov_from_dbr(VCPU *vcpu, INST64 inst)
   4.285 +static IA64FAULT priv_mov_from_dbr(VCPU *vcpu, INST64 inst)
   4.286  {
   4.287  	UINT64 val;
   4.288  	IA64FAULT fault;
   4.289 @@ -454,7 +456,7 @@ IA64FAULT priv_mov_from_dbr(VCPU *vcpu, 
   4.290  	else return fault;
   4.291  }
   4.292  
   4.293 -IA64FAULT priv_mov_from_ibr(VCPU *vcpu, INST64 inst)
   4.294 +static IA64FAULT priv_mov_from_ibr(VCPU *vcpu, INST64 inst)
   4.295  {
   4.296  	UINT64 val;
   4.297  	IA64FAULT fault;
   4.298 @@ -465,7 +467,7 @@ IA64FAULT priv_mov_from_ibr(VCPU *vcpu, 
   4.299  	else return fault;
   4.300  }
   4.301  
   4.302 -IA64FAULT priv_mov_from_pmc(VCPU *vcpu, INST64 inst)
   4.303 +static IA64FAULT priv_mov_from_pmc(VCPU *vcpu, INST64 inst)
   4.304  {
   4.305  	UINT64 val;
   4.306  	IA64FAULT fault;
   4.307 @@ -492,7 +494,7 @@ unsigned long from_cr_cnt[128] = { 0 };
   4.308  	((fault = vcpu_get_##cr(vcpu,&val)) == IA64_NO_FAULT) ? \
   4.309  		vcpu_set_gr(vcpu, tgt, val, 0) : fault;
   4.310  	
   4.311 -IA64FAULT priv_mov_from_cr(VCPU *vcpu, INST64 inst)
   4.312 +static IA64FAULT priv_mov_from_cr(VCPU *vcpu, INST64 inst)
   4.313  {
   4.314  	UINT64 tgt = inst.M33.r1;
   4.315  	UINT64 val;
   4.316 @@ -531,7 +533,7 @@ IA64FAULT priv_mov_from_cr(VCPU *vcpu, I
   4.317  	return IA64_ILLOP_FAULT;
   4.318  }
   4.319  
   4.320 -IA64FAULT priv_mov_from_psr(VCPU *vcpu, INST64 inst)
   4.321 +static IA64FAULT priv_mov_from_psr(VCPU *vcpu, INST64 inst)
   4.322  {
   4.323  	UINT64 tgt = inst.M33.r1;
   4.324  	UINT64 val;
   4.325 @@ -601,7 +603,7 @@ struct {
   4.326  
   4.327  unsigned long privop_trace = 0;
   4.328  
   4.329 -IA64FAULT
   4.330 +static IA64FAULT
   4.331  priv_handle_op(VCPU *vcpu, REGS *regs, int privlvl)
   4.332  {
   4.333  	IA64_BUNDLE bundle;
     5.1 --- a/xen/include/asm-ia64/config.h	Thu Jun 15 10:23:57 2006 -0600
     5.2 +++ b/xen/include/asm-ia64/config.h	Fri Jun 16 09:06:40 2006 -0600
     5.3 @@ -1,9 +1,6 @@
     5.4  #ifndef	_IA64_CONFIG_H_
     5.5  #define _IA64_CONFIG_H_
     5.6  
     5.7 -#undef USE_PAL_EMULATOR
     5.8 -// control flags for turning on/off features under test
     5.9 -#undef DOMU_BUILD_STAGING
    5.10  #define VHPT_GLOBAL
    5.11  
    5.12  #undef DEBUG_PFMON
    5.13 @@ -170,12 +167,6 @@ void sort_extable(struct exception_table
    5.14  		  struct exception_table_entry *finish);
    5.15  void sort_main_extable(void);
    5.16  
    5.17 -#if 0 /* Already defined in xen/lib.h */
    5.18 -#define printk printf
    5.19 -#endif
    5.20 -
    5.21 -#undef  __ARCH_IRQ_STAT
    5.22 -
    5.23  #define find_first_set_bit(x)	(ffs(x)-1)	// FIXME: Is this right???
    5.24  
    5.25  // see drivers/char/console.c
    5.26 @@ -278,4 +269,7 @@ struct screen_info { };
    5.27     Old as doesn't handle this.  */
    5.28  #define HAVE_SERIALIZE_DIRECTIVE
    5.29  
    5.30 +/* Define CONFIG_PRIVIFY to support privified OS (deprecated).  */
    5.31 +#undef CONFIG_PRIVIFY
    5.32 +
    5.33  #endif	/* _IA64_CONFIG_H_ */