direct-io.hg

changeset 4375:0111710ed751

bitkeeper revision 1.1236.49.1 (4249f373bNMSl7qxQlghqfQyK9POsg)

Simple global lVHPT support
author djm@kirby.fc.hp.com
date Wed Mar 30 00:31:47 2005 +0000 (2005-03-30)
parents 38c9523f3621
children 5ac1e6647195
files xen/arch/ia64/Rules.mk xen/arch/ia64/regionreg.c xen/arch/ia64/vcpu.c xen/arch/ia64/vhpt.c xen/arch/ia64/xenasm.S xen/arch/ia64/xensetup.c xen/include/asm-ia64/config.h xen/include/asm-ia64/vhpt.h
line diff
     1.1 --- a/xen/arch/ia64/Rules.mk	Fri Mar 25 22:52:21 2005 +0000
     1.2 +++ b/xen/arch/ia64/Rules.mk	Wed Mar 30 00:31:47 2005 +0000
     1.3 @@ -5,8 +5,8 @@ ifeq ($(COMPILE_ARCH),$(TARGET_ARCH))
     1.4  OBJCOPY = objcopy
     1.5  endif
     1.6  ifneq ($(COMPILE_ARCH),$(TARGET_ARCH))
     1.7 -CC = /usr/local/sp_env/v2.2/i686/bin/ia64-unknown-linux-gcc
     1.8 -LD = /usr/local/sp_env/v2.2/i686/bin/ia64-unknown-linux-ld
     1.9 +CC = /usr/local/sp_env/v2.2.3/i686/bin/ia64-unknown-linux-gcc
    1.10 +LD = /usr/local/sp_env/v2.2.3/i686/bin/ia64-unknown-linux-ld
    1.11  OBJCOPY = /usr/local/sp_env/v2.2/i686/bin/ia64-unknown-linux-objcopy
    1.12  endif
    1.13  HOSTCC := gcc
     2.1 --- a/xen/arch/ia64/regionreg.c	Fri Mar 25 22:52:21 2005 +0000
     2.2 +++ b/xen/arch/ia64/regionreg.c	Wed Mar 30 00:31:47 2005 +0000
     2.3 @@ -189,7 +189,7 @@ int deallocate_rid_range(struct domain *
     2.4  //  it should be unmangled
     2.5  
     2.6  //This appears to work in Xen... turn it on later so no complications yet
     2.7 -//#define CONFIG_MANGLE_RIDS
     2.8 +#define CONFIG_MANGLE_RIDS
     2.9  #ifdef CONFIG_MANGLE_RIDS
    2.10  static inline unsigned long
    2.11  vmMangleRID(unsigned long RIDVal)
     3.1 --- a/xen/arch/ia64/vcpu.c	Fri Mar 25 22:52:21 2005 +0000
     3.2 +++ b/xen/arch/ia64/vcpu.c	Wed Mar 30 00:31:47 2005 +0000
     3.3 @@ -1491,10 +1491,27 @@ void vcpu_itc_no_srlz(VCPU *vcpu, UINT64
     3.4  
     3.5  	// FIXME: validate ifa here (not in Xen space), COULD MACHINE CHECK!
     3.6  	// FIXME, must be inlined or potential for nested fault here!
     3.7 +	if ((vcpu->domain==dom0) && (logps < PAGE_SHIFT)) {
     3.8 +		printf("vcpu_itc_no_srlz: domain0 use of smaller page size!\n");
     3.9 +		//FIXME: kill domain here
    3.10 +		while(1);
    3.11 +	}
    3.12  	psr = ia64_clear_ic();
    3.13  	ia64_itc(IorD,vaddr,pte,ps); // FIXME: look for bigger mappings
    3.14  	ia64_set_psr(psr);
    3.15  	// ia64_srlz_i(); // no srls req'd, will rfi later
    3.16 +#ifdef VHPT_GLOBAL
    3.17 +	if (vcpu->domain==dom0 && ((vaddr >> 61) == 7)) {
    3.18 +		// FIXME: this is dangerous... vhpt_flush_address ensures these
    3.19 +		// addresses never get flushed.  More work needed if this
    3.20 +		// ever happens.
    3.21 +//printf("vhpt_insert(%p,%p,%p)\n",vaddr,pte,1L<<logps);
    3.22 +		vhpt_insert(vaddr,pte,logps<<2);
    3.23 +	}
    3.24 +	// even if domain pagesize is larger than PAGE_SIZE, just put
    3.25 +	// PAGE_SIZE mapping in the vhpt for now, else purging is complicated
    3.26 +	else vhpt_insert(vaddr,pte,PAGE_SHIFT<<2);
    3.27 +#endif
    3.28  	if (IorD & 0x4) return;  // don't place in 1-entry TLB
    3.29  	if (IorD & 0x1) {
    3.30  		vcpu_set_tr_entry(&PSCB(vcpu,itlb),pte,ps<<2,vaddr);
    3.31 @@ -1613,6 +1630,9 @@ IA64FAULT vcpu_ptc_e(VCPU *vcpu, UINT64 
    3.32  	//  base = stride1 = stride2 = 0, count0 = count 1 = 1
    3.33  
    3.34  	// FIXME: When VHPT is in place, flush that too!
    3.35 +#ifdef VHPT_GLOBAL
    3.36 +	vhpt_flush();	// FIXME: This is overdoing it
    3.37 +#endif
    3.38  	local_flush_tlb_all();
    3.39  	// just invalidate the "whole" tlb
    3.40  	vcpu_purge_tr_entry(&PSCB(vcpu,dtlb));
    3.41 @@ -1632,6 +1652,9 @@ IA64FAULT vcpu_ptc_ga(VCPU *vcpu,UINT64 
    3.42  	// FIXME: validate not flushing Xen addresses
    3.43  	// if (Xen address) return(IA64_ILLOP_FAULT);
    3.44  	// FIXME: ??breaks if domain PAGE_SIZE < Xen PAGE_SIZE
    3.45 +#ifdef VHPT_GLOBAL
    3.46 +	vhpt_flush_address(vadr,addr_range);
    3.47 +#endif
    3.48  	ia64_global_tlb_purge(vadr,vadr+addr_range,PAGE_SHIFT);
    3.49  	vcpu_purge_tr_entry(&PSCB(vcpu,dtlb));
    3.50  	vcpu_purge_tr_entry(&PSCB(vcpu,itlb));
     4.1 --- a/xen/arch/ia64/vhpt.c	Fri Mar 25 22:52:21 2005 +0000
     4.2 +++ b/xen/arch/ia64/vhpt.c	Wed Mar 30 00:31:47 2005 +0000
     4.3 @@ -20,7 +20,7 @@ unsigned long vhpt_paddr, vhpt_pend, vhp
     4.4  void vhpt_flush(void)
     4.5  {
     4.6  	struct vhpt_lf_entry *v = (void *)VHPT_ADDR;
     4.7 -	int i;
     4.8 +	int i, cnt = 0;
     4.9  
    4.10  	for (i = 0; i < VHPT_NUM_ENTRIES; i++, v++) {
    4.11  		v->itir = 0;
    4.12 @@ -31,6 +31,39 @@ void vhpt_flush(void)
    4.13  	// initialize cache too???
    4.14  }
    4.15  
    4.16 +#ifdef VHPT_GLOBAL
    4.17 +void vhpt_flush_address(unsigned long vadr, unsigned long addr_range)
    4.18 +{
    4.19 +	unsigned long ps;
    4.20 +	struct vhpt_lf_entry *vlfe;
    4.21 +
    4.22 +	if ((vadr >> 61) == 7) {
    4.23 +		// no vhpt for region 7 yet, see vcpu_itc_no_srlz
    4.24 +		printf("vhpt_flush_address: region 7, spinning...\n");
    4.25 +		while(1);
    4.26 +	}
    4.27 +#if 0
    4.28 +	// this only seems to occur at shutdown, but it does occur
    4.29 +	if ((!addr_range) || addr_range & (addr_range - 1)) {
    4.30 +		printf("vhpt_flush_address: weird range, spinning...\n");
    4.31 +		while(1);
    4.32 +	}
    4.33 +//printf("************** vhpt_flush_address(%p,%p)\n",vadr,addr_range);
    4.34 +#endif
    4.35 +	while ((long)addr_range > 0) {
    4.36 +		vlfe = (struct vhpt_lf_entry *)ia64_thash(vadr);
    4.37 +		// FIXME: for now, just blow it away even if it belongs to
    4.38 +		// another domain.  Later, use ttag to check for match
    4.39 +//if (!(vlfe->ti_tag & INVALID_TI_TAG)) {
    4.40 +//printf("vhpt_flush_address: blowing away valid tag for vadr=%p\n",vadr);
    4.41 +//}
    4.42 +		vlfe->ti_tag |= INVALID_TI_TAG;
    4.43 +		addr_range -= PAGE_SIZE;
    4.44 +		vadr += PAGE_SIZE;
    4.45 +	}
    4.46 +}
    4.47 +#endif
    4.48 +
    4.49  void vhpt_map(void)
    4.50  {
    4.51  	unsigned long psr;
     5.1 --- a/xen/arch/ia64/xenasm.S	Fri Mar 25 22:52:21 2005 +0000
     5.2 +++ b/xen/arch/ia64/xenasm.S	Wed Mar 30 00:31:47 2005 +0000
     5.3 @@ -465,3 +465,16 @@ 1:
     5.4  stacked:
     5.5  	br.ret.sptk.few rp
     5.6  END(pal_emulator_static)
     5.7 +
     5.8 +GLOBAL_ENTRY(vhpt_insert)
     5.9 +//	alloc loc0 = ar.pfs, 3, 1, 0, 0
    5.10 +	mov r16=r32
    5.11 +	mov r26=r33
    5.12 +	mov r27=r34
    5.13 +	;;
    5.14 +	VHPT_INSERT()
    5.15 +//	VHPT_INSERT1()	... add collision chains later
    5.16 +//	mov ar.pfs = loc0
    5.17 +	br.ret.sptk.few rp
    5.18 +	;;
    5.19 +END(vhpt_insert)
     6.1 --- a/xen/arch/ia64/xensetup.c	Fri Mar 25 22:52:21 2005 +0000
     6.2 +++ b/xen/arch/ia64/xensetup.c	Wed Mar 30 00:31:47 2005 +0000
     6.3 @@ -309,7 +309,8 @@ printk("CONSTRUCTING DOMAIN0 CLONE #%d\n
     6.4      /* The stash space for the initial kernel image can now be freed up. */
     6.5      init_domheap_pages(ia64_boot_param->initrd_start,
     6.6  		       ia64_boot_param->initrd_start + ia64_boot_param->initrd_size);
     6.7 -    scrub_heap_pages();
     6.8 +    if (!running_on_sim)  // slow on ski and pages are pre-initialized to zero
     6.9 +	scrub_heap_pages();
    6.10  
    6.11  printk("About to call init_trace_bufs()\n");
    6.12      init_trace_bufs();
     7.1 --- a/xen/include/asm-ia64/config.h	Fri Mar 25 22:52:21 2005 +0000
     7.2 +++ b/xen/include/asm-ia64/config.h	Wed Mar 30 00:31:47 2005 +0000
     7.3 @@ -2,6 +2,7 @@
     7.4  #undef CLONE_DOMAIN0
     7.5  //#define CLONE_DOMAIN0 5
     7.6  #define DOMU_BUILD_STAGING
     7.7 +#define VHPT_GLOBAL
     7.8  
     7.9  // manufactured from component pieces
    7.10  
     8.1 --- a/xen/include/asm-ia64/vhpt.h	Fri Mar 25 22:52:21 2005 +0000
     8.2 +++ b/xen/include/asm-ia64/vhpt.h	Wed Mar 30 00:31:47 2005 +0000
     8.3 @@ -19,6 +19,7 @@
     8.4  //#define	VHPT_NUM_ENTRIES		131072
     8.5  //#define	VHPT_CACHE_MASK			131071
     8.6  //#define	VHPT_SIZE_LOG2			22	//????
     8.7 +#define	VHPT_CACHE_ENTRY_SIZE		64
     8.8  #define	VHPT_CACHE_NUM_ENTRIES		8192
     8.9  #define	VHPT_NUM_ENTRIES		524288
    8.10  #define	VHPT_CACHE_MASK			524287
    8.11 @@ -353,7 +354,7 @@ FindOne:;\
    8.12  		and r23 = r23, r24;\
    8.13  \
    8.14  \
    8.15 -		movl r17 = G_VHPT_Cache;\
    8.16 +		movl r17 = VHPT_ADDR;\
    8.17  		;;\
    8.18  \
    8.19  \