# HG changeset patch
# User adsharma@los-vmm.sc.intel.com
# Date 1124137687 28800
# Node ID b5196e075602b1463f93d06a8ec14842c1217f22
# Parent  29aab159846c9348b5bc6de410b457f163acee3b
Enable multi-word DMA mode 2 for the PIIX3 chipset

Without this patch, Linux PIIX3 driver would see ultra DMA and get confused
and ended up disabling DMA.

With the patch, we're able to see 3x increase in disk read throughput.

Signed-off-by: Winston Wang <winston.l.wang@intel.com>
Signed-off-by: Arun Sharma <arun.sharma@intel.com>



diff -r 29aab159846c -r b5196e075602 tools/ioemu/hw/ide.c
--- a/tools/ioemu/hw/ide.c	Mon Aug 15 10:32:29 2005 -0800
+++ b/tools/ioemu/hw/ide.c	Mon Aug 15 12:28:07 2005 -0800
@@ -430,6 +430,7 @@ static void ide_identify(IDEState *s)
         put_le16(p + 59, 0x100 | s->mult_sectors);
     put_le16(p + 60, s->nb_sectors);
     put_le16(p + 61, s->nb_sectors >> 16);
+    put_le16(p + 63, 0x07);
     put_le16(p + 80, (1 << 1) | (1 << 2));
     put_le16(p + 82, (1 << 14));
     put_le16(p + 83, (1 << 14));
@@ -460,7 +461,7 @@ static void ide_atapi_identify(IDEState 
     put_le16(p + 48, 1); /* dword I/O (XXX: should not be set on CDROM) */
     put_le16(p + 49, 1 << 9); /* LBA supported, no DMA */
     put_le16(p + 53, 3); /* words 64-70, 54-58 valid */
-    put_le16(p + 63, 0x103); /* DMA modes XXX: may be incorrect */
+    put_le16(p + 63, 0x07); /* Multi-word DMA mode 2 */ 
     put_le16(p + 64, 1); /* PIO modes */
     put_le16(p + 65, 0xb4); /* minimum DMA multiword tx cycle time */
     put_le16(p + 66, 0xb4); /* recommended DMA multiword tx cycle time */