direct-io.hg

view xen/arch/x86/hvm/platform.c @ 13986:e846a7a444fa

hvm: Emulate opcode 0x03 (ADD mem,reg).
Signed-off-by: Keir Fraser <keir@xensource.com>
author kfraser@localhost.localdomain
date Mon Feb 19 15:43:27 2007 +0000 (2007-02-19)
parents b5fc88aad1b0
children b90180c2a057
line source
1 /*
2 * platform.c: handling x86 platform related MMIO instructions
3 *
4 * Copyright (c) 2004, Intel Corporation.
5 * Copyright (c) 2005, International Business Machines Corporation.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
18 * Place - Suite 330, Boston, MA 02111-1307 USA.
19 */
21 #include <xen/config.h>
22 #include <xen/types.h>
23 #include <xen/mm.h>
24 #include <xen/domain_page.h>
25 #include <asm/page.h>
26 #include <xen/event.h>
27 #include <xen/trace.h>
28 #include <xen/sched.h>
29 #include <asm/regs.h>
30 #include <asm/x86_emulate.h>
31 #include <asm/paging.h>
32 #include <asm/hvm/hvm.h>
33 #include <asm/hvm/support.h>
34 #include <asm/hvm/io.h>
35 #include <public/hvm/ioreq.h>
37 #include <xen/lib.h>
38 #include <xen/sched.h>
39 #include <asm/current.h>
41 #define DECODE_success 1
42 #define DECODE_failure 0
44 #define mk_operand(size_reg, index, seg, flag) \
45 (((size_reg) << 24) | ((index) << 16) | ((seg) << 8) | (flag))
47 #if defined (__x86_64__)
48 static inline long __get_reg_value(unsigned long reg, int size)
49 {
50 switch ( size ) {
51 case BYTE_64:
52 return (char)(reg & 0xFF);
53 case WORD:
54 return (short)(reg & 0xFFFF);
55 case LONG:
56 return (int)(reg & 0xFFFFFFFF);
57 case QUAD:
58 return (long)(reg);
59 default:
60 printk("Error: (__get_reg_value) Invalid reg size\n");
61 domain_crash_synchronous();
62 }
63 }
65 long get_reg_value(int size, int index, int seg, struct cpu_user_regs *regs)
66 {
67 if ( size == BYTE ) {
68 switch ( index ) {
69 case 0: /* %al */
70 return (char)(regs->rax & 0xFF);
71 case 1: /* %cl */
72 return (char)(regs->rcx & 0xFF);
73 case 2: /* %dl */
74 return (char)(regs->rdx & 0xFF);
75 case 3: /* %bl */
76 return (char)(regs->rbx & 0xFF);
77 case 4: /* %ah */
78 return (char)((regs->rax & 0xFF00) >> 8);
79 case 5: /* %ch */
80 return (char)((regs->rcx & 0xFF00) >> 8);
81 case 6: /* %dh */
82 return (char)((regs->rdx & 0xFF00) >> 8);
83 case 7: /* %bh */
84 return (char)((regs->rbx & 0xFF00) >> 8);
85 default:
86 printk("Error: (get_reg_value) Invalid index value\n");
87 domain_crash_synchronous();
88 }
89 /* NOTREACHED */
90 }
92 switch ( index ) {
93 case 0: return __get_reg_value(regs->rax, size);
94 case 1: return __get_reg_value(regs->rcx, size);
95 case 2: return __get_reg_value(regs->rdx, size);
96 case 3: return __get_reg_value(regs->rbx, size);
97 case 4: return __get_reg_value(regs->rsp, size);
98 case 5: return __get_reg_value(regs->rbp, size);
99 case 6: return __get_reg_value(regs->rsi, size);
100 case 7: return __get_reg_value(regs->rdi, size);
101 case 8: return __get_reg_value(regs->r8, size);
102 case 9: return __get_reg_value(regs->r9, size);
103 case 10: return __get_reg_value(regs->r10, size);
104 case 11: return __get_reg_value(regs->r11, size);
105 case 12: return __get_reg_value(regs->r12, size);
106 case 13: return __get_reg_value(regs->r13, size);
107 case 14: return __get_reg_value(regs->r14, size);
108 case 15: return __get_reg_value(regs->r15, size);
109 default:
110 printk("Error: (get_reg_value) Invalid index value\n");
111 domain_crash_synchronous();
112 }
113 }
114 #elif defined (__i386__)
115 static inline long __get_reg_value(unsigned long reg, int size)
116 {
117 switch ( size ) {
118 case WORD:
119 return (short)(reg & 0xFFFF);
120 case LONG:
121 return (int)(reg & 0xFFFFFFFF);
122 default:
123 printk("Error: (__get_reg_value) Invalid reg size\n");
124 domain_crash_synchronous();
125 }
126 }
128 long get_reg_value(int size, int index, int seg, struct cpu_user_regs *regs)
129 {
130 if ( size == BYTE ) {
131 switch ( index ) {
132 case 0: /* %al */
133 return (char)(regs->eax & 0xFF);
134 case 1: /* %cl */
135 return (char)(regs->ecx & 0xFF);
136 case 2: /* %dl */
137 return (char)(regs->edx & 0xFF);
138 case 3: /* %bl */
139 return (char)(regs->ebx & 0xFF);
140 case 4: /* %ah */
141 return (char)((regs->eax & 0xFF00) >> 8);
142 case 5: /* %ch */
143 return (char)((regs->ecx & 0xFF00) >> 8);
144 case 6: /* %dh */
145 return (char)((regs->edx & 0xFF00) >> 8);
146 case 7: /* %bh */
147 return (char)((regs->ebx & 0xFF00) >> 8);
148 default:
149 printk("Error: (get_reg_value) Invalid index value\n");
150 domain_crash_synchronous();
151 }
152 }
154 switch ( index ) {
155 case 0: return __get_reg_value(regs->eax, size);
156 case 1: return __get_reg_value(regs->ecx, size);
157 case 2: return __get_reg_value(regs->edx, size);
158 case 3: return __get_reg_value(regs->ebx, size);
159 case 4: return __get_reg_value(regs->esp, size);
160 case 5: return __get_reg_value(regs->ebp, size);
161 case 6: return __get_reg_value(regs->esi, size);
162 case 7: return __get_reg_value(regs->edi, size);
163 default:
164 printk("Error: (get_reg_value) Invalid index value\n");
165 domain_crash_synchronous();
166 }
167 }
168 #endif
170 static inline unsigned char *check_prefix(unsigned char *inst,
171 struct hvm_io_op *mmio_op,
172 unsigned char *ad_size,
173 unsigned char *op_size,
174 unsigned char *seg_sel,
175 unsigned char *rex_p)
176 {
177 while ( 1 ) {
178 switch ( *inst ) {
179 /* rex prefix for em64t instructions */
180 case 0x40 ... 0x4f:
181 *rex_p = *inst;
182 break;
183 case 0xf3: /* REPZ */
184 mmio_op->flags = REPZ;
185 break;
186 case 0xf2: /* REPNZ */
187 mmio_op->flags = REPNZ;
188 break;
189 case 0xf0: /* LOCK */
190 break;
191 case 0x2e: /* CS */
192 case 0x36: /* SS */
193 case 0x3e: /* DS */
194 case 0x26: /* ES */
195 case 0x64: /* FS */
196 case 0x65: /* GS */
197 *seg_sel = *inst;
198 break;
199 case 0x66: /* 32bit->16bit */
200 *op_size = WORD;
201 break;
202 case 0x67:
203 *ad_size = WORD;
204 break;
205 default:
206 return inst;
207 }
208 inst++;
209 }
210 }
212 static inline unsigned long get_immediate(int ad_size, const unsigned char *inst, int op_size)
213 {
214 int mod, reg, rm;
215 unsigned long val = 0;
216 int i;
218 mod = (*inst >> 6) & 3;
219 reg = (*inst >> 3) & 7;
220 rm = *inst & 7;
222 inst++; //skip ModR/M byte
223 if ( ad_size != WORD && mod != 3 && rm == 4 ) {
224 rm = *inst & 7;
225 inst++; //skip SIB byte
226 }
228 switch ( mod ) {
229 case 0:
230 if ( ad_size == WORD ) {
231 if ( rm == 6 )
232 inst = inst + 2; //disp16, skip 2 bytes
233 }
234 else {
235 if ( rm == 5 )
236 inst = inst + 4; //disp32, skip 4 bytes
237 }
238 break;
239 case 1:
240 inst++; //disp8, skip 1 byte
241 break;
242 case 2:
243 if ( ad_size == WORD )
244 inst = inst + 2; //disp16, skip 2 bytes
245 else
246 inst = inst + 4; //disp32, skip 4 bytes
247 break;
248 }
250 if ( op_size == QUAD )
251 op_size = LONG;
253 for ( i = 0; i < op_size; i++ ) {
254 val |= (*inst++ & 0xff) << (8 * i);
255 }
257 return val;
258 }
260 static inline int get_index(const unsigned char *inst, unsigned char rex)
261 {
262 int mod, reg, rm;
263 int rex_r, rex_b;
265 mod = (*inst >> 6) & 3;
266 reg = (*inst >> 3) & 7;
267 rm = *inst & 7;
269 rex_r = (rex >> 2) & 1;
270 rex_b = rex & 1;
272 //Only one operand in the instruction is register
273 if ( mod == 3 ) {
274 return (rm + (rex_b << 3));
275 } else {
276 return (reg + (rex_r << 3));
277 }
278 return 0;
279 }
281 static void init_instruction(struct hvm_io_op *mmio_op)
282 {
283 mmio_op->instr = 0;
285 mmio_op->flags = 0;
287 mmio_op->operand[0] = 0;
288 mmio_op->operand[1] = 0;
289 mmio_op->immediate = 0;
290 }
292 #define GET_OP_SIZE_FOR_BYTE(size_reg) \
293 do { \
294 if ( rex ) \
295 (size_reg) = BYTE_64; \
296 else \
297 (size_reg) = BYTE; \
298 } while( 0 )
300 #define GET_OP_SIZE_FOR_NONEBYTE(op_size) \
301 do { \
302 if ( rex & 0x8 ) \
303 (op_size) = QUAD; \
304 else if ( (op_size) != WORD ) \
305 (op_size) = LONG; \
306 } while( 0 )
309 /*
310 * Decode mem,accumulator operands (as in <opcode> m8/m16/m32, al,ax,eax)
311 */
312 static inline int mem_acc(unsigned char size, struct hvm_io_op *mmio)
313 {
314 mmio->operand[0] = mk_operand(size, 0, 0, MEMORY);
315 mmio->operand[1] = mk_operand(size, 0, 0, REGISTER);
316 return DECODE_success;
317 }
319 /*
320 * Decode accumulator,mem operands (as in <opcode> al,ax,eax, m8/m16/m32)
321 */
322 static inline int acc_mem(unsigned char size, struct hvm_io_op *mmio)
323 {
324 mmio->operand[0] = mk_operand(size, 0, 0, REGISTER);
325 mmio->operand[1] = mk_operand(size, 0, 0, MEMORY);
326 return DECODE_success;
327 }
329 /*
330 * Decode mem,reg operands (as in <opcode> r32/16, m32/16)
331 */
332 static int mem_reg(unsigned char size, unsigned char *opcode,
333 struct hvm_io_op *mmio_op, unsigned char rex)
334 {
335 int index = get_index(opcode + 1, rex);
337 mmio_op->operand[0] = mk_operand(size, 0, 0, MEMORY);
338 mmio_op->operand[1] = mk_operand(size, index, 0, REGISTER);
339 return DECODE_success;
340 }
342 /*
343 * Decode reg,mem operands (as in <opcode> m32/16, r32/16)
344 */
345 static int reg_mem(unsigned char size, unsigned char *opcode,
346 struct hvm_io_op *mmio_op, unsigned char rex)
347 {
348 int index = get_index(opcode + 1, rex);
350 mmio_op->operand[0] = mk_operand(size, index, 0, REGISTER);
351 mmio_op->operand[1] = mk_operand(size, 0, 0, MEMORY);
352 return DECODE_success;
353 }
355 static int mmio_decode(int address_bytes, unsigned char *opcode,
356 struct hvm_io_op *mmio_op,
357 unsigned char *ad_size, unsigned char *op_size,
358 unsigned char *seg_sel)
359 {
360 unsigned char size_reg = 0;
361 unsigned char rex = 0;
362 int index;
364 *ad_size = 0;
365 *op_size = 0;
366 *seg_sel = 0;
367 init_instruction(mmio_op);
369 opcode = check_prefix(opcode, mmio_op, ad_size, op_size, seg_sel, &rex);
371 switch ( address_bytes )
372 {
373 case 2:
374 if ( *op_size == WORD )
375 *op_size = LONG;
376 else if ( *op_size == LONG )
377 *op_size = WORD;
378 else if ( *op_size == 0 )
379 *op_size = WORD;
380 if ( *ad_size == WORD )
381 *ad_size = LONG;
382 else if ( *ad_size == LONG )
383 *ad_size = WORD;
384 else if ( *ad_size == 0 )
385 *ad_size = WORD;
386 break;
387 case 4:
388 if ( *op_size == 0 )
389 *op_size = LONG;
390 if ( *ad_size == 0 )
391 *ad_size = LONG;
392 break;
393 #ifdef __x86_64__
394 case 8:
395 if ( *op_size == 0 )
396 *op_size = rex & 0x8 ? QUAD : LONG;
397 if ( *ad_size == 0 )
398 *ad_size = QUAD;
399 break;
400 #endif
401 }
403 /* the operands order in comments conforms to AT&T convention */
405 switch ( *opcode ) {
407 case 0x00: /* add r8, m8 */
408 mmio_op->instr = INSTR_ADD;
409 *op_size = BYTE;
410 GET_OP_SIZE_FOR_BYTE(size_reg);
411 return reg_mem(size_reg, opcode, mmio_op, rex);
413 case 0x03: /* add m32/16, r32/16 */
414 mmio_op->instr = INSTR_ADD;
415 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
416 return mem_reg(*op_size, opcode, mmio_op, rex);
418 case 0x0A: /* or m8, r8 */
419 mmio_op->instr = INSTR_OR;
420 *op_size = BYTE;
421 GET_OP_SIZE_FOR_BYTE(size_reg);
422 return mem_reg(size_reg, opcode, mmio_op, rex);
424 case 0x0B: /* or m32/16, r32/16 */
425 mmio_op->instr = INSTR_OR;
426 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
427 return mem_reg(*op_size, opcode, mmio_op, rex);
429 case 0x20: /* and r8, m8 */
430 mmio_op->instr = INSTR_AND;
431 *op_size = BYTE;
432 GET_OP_SIZE_FOR_BYTE(size_reg);
433 return reg_mem(size_reg, opcode, mmio_op, rex);
435 case 0x21: /* and r32/16, m32/16 */
436 mmio_op->instr = INSTR_AND;
437 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
438 return reg_mem(*op_size, opcode, mmio_op, rex);
440 case 0x22: /* and m8, r8 */
441 mmio_op->instr = INSTR_AND;
442 *op_size = BYTE;
443 GET_OP_SIZE_FOR_BYTE(size_reg);
444 return mem_reg(size_reg, opcode, mmio_op, rex);
446 case 0x23: /* and m32/16, r32/16 */
447 mmio_op->instr = INSTR_AND;
448 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
449 return mem_reg(*op_size, opcode, mmio_op, rex);
451 case 0x2B: /* sub m32/16, r32/16 */
452 mmio_op->instr = INSTR_SUB;
453 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
454 return mem_reg(*op_size, opcode, mmio_op, rex);
456 case 0x30: /* xor r8, m8 */
457 mmio_op->instr = INSTR_XOR;
458 *op_size = BYTE;
459 GET_OP_SIZE_FOR_BYTE(size_reg);
460 return reg_mem(size_reg, opcode, mmio_op, rex);
462 case 0x31: /* xor r32/16, m32/16 */
463 mmio_op->instr = INSTR_XOR;
464 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
465 return reg_mem(*op_size, opcode, mmio_op, rex);
467 case 0x32: /* xor m8, r8 */
468 mmio_op->instr = INSTR_XOR;
469 *op_size = BYTE;
470 GET_OP_SIZE_FOR_BYTE(size_reg);
471 return mem_reg(size_reg, opcode, mmio_op, rex);
473 case 0x38: /* cmp r8, m8 */
474 mmio_op->instr = INSTR_CMP;
475 *op_size = BYTE;
476 GET_OP_SIZE_FOR_BYTE(size_reg);
477 return reg_mem(size_reg, opcode, mmio_op, rex);
479 case 0x39: /* cmp r32/16, m32/16 */
480 mmio_op->instr = INSTR_CMP;
481 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
482 return reg_mem(*op_size, opcode, mmio_op, rex);
484 case 0x3A: /* cmp m8, r8 */
485 mmio_op->instr = INSTR_CMP;
486 *op_size = BYTE;
487 GET_OP_SIZE_FOR_BYTE(size_reg);
488 return mem_reg(size_reg, opcode, mmio_op, rex);
490 case 0x3B: /* cmp m32/16, r32/16 */
491 mmio_op->instr = INSTR_CMP;
492 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
493 return mem_reg(*op_size, opcode, mmio_op, rex);
495 case 0x80:
496 case 0x81:
497 case 0x83:
498 {
499 unsigned char ins_subtype = (opcode[1] >> 3) & 7;
501 if ( opcode[0] == 0x80 ) {
502 *op_size = BYTE;
503 GET_OP_SIZE_FOR_BYTE(size_reg);
504 } else {
505 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
506 size_reg = *op_size;
507 }
509 /* opcode 0x83 always has a single byte operand */
510 if ( opcode[0] == 0x83 )
511 mmio_op->immediate =
512 (signed char)get_immediate(*ad_size, opcode + 1, BYTE);
513 else
514 mmio_op->immediate =
515 get_immediate(*ad_size, opcode + 1, *op_size);
517 mmio_op->operand[0] = mk_operand(size_reg, 0, 0, IMMEDIATE);
518 mmio_op->operand[1] = mk_operand(size_reg, 0, 0, MEMORY);
520 switch ( ins_subtype ) {
521 case 0: /* add $imm, m32/16 */
522 mmio_op->instr = INSTR_ADD;
523 return DECODE_success;
525 case 1: /* or $imm, m32/16 */
526 mmio_op->instr = INSTR_OR;
527 return DECODE_success;
529 case 4: /* and $imm, m32/16 */
530 mmio_op->instr = INSTR_AND;
531 return DECODE_success;
533 case 5: /* sub $imm, m32/16 */
534 mmio_op->instr = INSTR_SUB;
535 return DECODE_success;
537 case 6: /* xor $imm, m32/16 */
538 mmio_op->instr = INSTR_XOR;
539 return DECODE_success;
541 case 7: /* cmp $imm, m32/16 */
542 mmio_op->instr = INSTR_CMP;
543 return DECODE_success;
545 default:
546 printk("%x/%x, This opcode isn't handled yet!\n",
547 *opcode, ins_subtype);
548 return DECODE_failure;
549 }
550 }
552 case 0x84: /* test r8, m8 */
553 mmio_op->instr = INSTR_TEST;
554 *op_size = BYTE;
555 GET_OP_SIZE_FOR_BYTE(size_reg);
556 return reg_mem(size_reg, opcode, mmio_op, rex);
558 case 0x85: /* test r16/32, m16/32 */
559 mmio_op->instr = INSTR_TEST;
560 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
561 return reg_mem(*op_size, opcode, mmio_op, rex);
563 case 0x86: /* xchg m8, r8 */
564 mmio_op->instr = INSTR_XCHG;
565 *op_size = BYTE;
566 GET_OP_SIZE_FOR_BYTE(size_reg);
567 return reg_mem(size_reg, opcode, mmio_op, rex);
569 case 0x87: /* xchg m16/32, r16/32 */
570 mmio_op->instr = INSTR_XCHG;
571 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
572 return reg_mem(*op_size, opcode, mmio_op, rex);
574 case 0x88: /* mov r8, m8 */
575 mmio_op->instr = INSTR_MOV;
576 *op_size = BYTE;
577 GET_OP_SIZE_FOR_BYTE(size_reg);
578 return reg_mem(size_reg, opcode, mmio_op, rex);
580 case 0x89: /* mov r32/16, m32/16 */
581 mmio_op->instr = INSTR_MOV;
582 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
583 return reg_mem(*op_size, opcode, mmio_op, rex);
585 case 0x8A: /* mov m8, r8 */
586 mmio_op->instr = INSTR_MOV;
587 *op_size = BYTE;
588 GET_OP_SIZE_FOR_BYTE(size_reg);
589 return mem_reg(size_reg, opcode, mmio_op, rex);
591 case 0x8B: /* mov m32/16, r32/16 */
592 mmio_op->instr = INSTR_MOV;
593 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
594 return mem_reg(*op_size, opcode, mmio_op, rex);
596 case 0xA0: /* mov <addr>, al */
597 mmio_op->instr = INSTR_MOV;
598 *op_size = BYTE;
599 GET_OP_SIZE_FOR_BYTE(size_reg);
600 return mem_acc(size_reg, mmio_op);
602 case 0xA1: /* mov <addr>, ax/eax */
603 mmio_op->instr = INSTR_MOV;
604 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
605 return mem_acc(*op_size, mmio_op);
607 case 0xA2: /* mov al, <addr> */
608 mmio_op->instr = INSTR_MOV;
609 *op_size = BYTE;
610 GET_OP_SIZE_FOR_BYTE(size_reg);
611 return acc_mem(size_reg, mmio_op);
613 case 0xA3: /* mov ax/eax, <addr> */
614 mmio_op->instr = INSTR_MOV;
615 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
616 return acc_mem(*op_size, mmio_op);
618 case 0xA4: /* movsb */
619 mmio_op->instr = INSTR_MOVS;
620 *op_size = BYTE;
621 return DECODE_success;
623 case 0xA5: /* movsw/movsl */
624 mmio_op->instr = INSTR_MOVS;
625 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
626 return DECODE_success;
628 case 0xAA: /* stosb */
629 mmio_op->instr = INSTR_STOS;
630 *op_size = BYTE;
631 return DECODE_success;
633 case 0xAB: /* stosw/stosl */
634 mmio_op->instr = INSTR_STOS;
635 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
636 return DECODE_success;
638 case 0xAC: /* lodsb */
639 mmio_op->instr = INSTR_LODS;
640 *op_size = BYTE;
641 return DECODE_success;
643 case 0xAD: /* lodsw/lodsl */
644 mmio_op->instr = INSTR_LODS;
645 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
646 return DECODE_success;
648 case 0xC6:
649 if ( ((opcode[1] >> 3) & 7) == 0 ) { /* mov $imm8, m8 */
650 mmio_op->instr = INSTR_MOV;
651 *op_size = BYTE;
653 mmio_op->operand[0] = mk_operand(*op_size, 0, 0, IMMEDIATE);
654 mmio_op->immediate =
655 get_immediate(*ad_size, opcode + 1, *op_size);
656 mmio_op->operand[1] = mk_operand(*op_size, 0, 0, MEMORY);
658 return DECODE_success;
659 } else
660 return DECODE_failure;
662 case 0xC7:
663 if ( ((opcode[1] >> 3) & 7) == 0 ) { /* mov $imm16/32, m16/32 */
664 mmio_op->instr = INSTR_MOV;
665 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
667 mmio_op->operand[0] = mk_operand(*op_size, 0, 0, IMMEDIATE);
668 mmio_op->immediate =
669 get_immediate(*ad_size, opcode + 1, *op_size);
670 mmio_op->operand[1] = mk_operand(*op_size, 0, 0, MEMORY);
672 return DECODE_success;
673 } else
674 return DECODE_failure;
676 case 0xF6:
677 case 0xF7:
678 if ( ((opcode[1] >> 3) & 7) == 0 ) { /* test $imm8/16/32, m8/16/32 */
679 mmio_op->instr = INSTR_TEST;
681 if ( opcode[0] == 0xF6 ) {
682 *op_size = BYTE;
683 GET_OP_SIZE_FOR_BYTE(size_reg);
684 } else {
685 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
686 size_reg = *op_size;
687 }
689 mmio_op->operand[0] = mk_operand(size_reg, 0, 0, IMMEDIATE);
690 mmio_op->immediate =
691 get_immediate(*ad_size, opcode + 1, *op_size);
692 mmio_op->operand[1] = mk_operand(size_reg, 0, 0, MEMORY);
694 return DECODE_success;
695 } else
696 return DECODE_failure;
698 case 0xFE:
699 case 0xFF:
700 {
701 unsigned char ins_subtype = (opcode[1] >> 3) & 7;
703 if ( opcode[0] == 0xFE ) {
704 *op_size = BYTE;
705 GET_OP_SIZE_FOR_BYTE(size_reg);
706 } else {
707 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
708 size_reg = *op_size;
709 }
711 mmio_op->immediate = 1;
712 mmio_op->operand[0] = mk_operand(size_reg, 0, 0, IMMEDIATE);
713 mmio_op->operand[1] = mk_operand(size_reg, 0, 0, MEMORY);
715 switch ( ins_subtype ) {
716 case 0: /* inc */
717 mmio_op->instr = INSTR_ADD;
718 return DECODE_success;
720 case 1: /* dec */
721 mmio_op->instr = INSTR_SUB;
722 return DECODE_success;
724 case 6: /* push */
725 mmio_op->instr = INSTR_PUSH;
726 mmio_op->operand[0] = mmio_op->operand[1];
727 return DECODE_success;
729 default:
730 printk("%x/%x, This opcode isn't handled yet!\n",
731 *opcode, ins_subtype);
732 return DECODE_failure;
733 }
734 }
736 case 0x0F:
737 break;
739 default:
740 printk("%x, This opcode isn't handled yet!\n", *opcode);
741 return DECODE_failure;
742 }
744 switch ( *++opcode ) {
745 case 0xB6: /* movzx m8, r16/r32/r64 */
746 mmio_op->instr = INSTR_MOVZX;
747 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
748 index = get_index(opcode + 1, rex);
749 mmio_op->operand[0] = mk_operand(BYTE, 0, 0, MEMORY);
750 mmio_op->operand[1] = mk_operand(*op_size, index, 0, REGISTER);
751 return DECODE_success;
753 case 0xB7: /* movzx m16, r32/r64 */
754 mmio_op->instr = INSTR_MOVZX;
755 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
756 index = get_index(opcode + 1, rex);
757 mmio_op->operand[0] = mk_operand(WORD, 0, 0, MEMORY);
758 mmio_op->operand[1] = mk_operand(*op_size, index, 0, REGISTER);
759 return DECODE_success;
761 case 0xBE: /* movsx m8, r16/r32/r64 */
762 mmio_op->instr = INSTR_MOVSX;
763 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
764 index = get_index(opcode + 1, rex);
765 mmio_op->operand[0] = mk_operand(BYTE, 0, 0, MEMORY);
766 mmio_op->operand[1] = mk_operand(*op_size, index, 0, REGISTER);
767 return DECODE_success;
769 case 0xBF: /* movsx m16, r32/r64 */
770 mmio_op->instr = INSTR_MOVSX;
771 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
772 index = get_index(opcode + 1, rex);
773 mmio_op->operand[0] = mk_operand(WORD, 0, 0, MEMORY);
774 mmio_op->operand[1] = mk_operand(*op_size, index, 0, REGISTER);
775 return DECODE_success;
777 case 0xA3: /* bt r32, m32 */
778 mmio_op->instr = INSTR_BT;
779 index = get_index(opcode + 1, rex);
780 *op_size = LONG;
781 mmio_op->operand[0] = mk_operand(*op_size, index, 0, REGISTER);
782 mmio_op->operand[1] = mk_operand(*op_size, 0, 0, MEMORY);
783 return DECODE_success;
785 case 0xBA:
786 if ( ((opcode[1] >> 3) & 7) == 4 ) /* BT $imm8, m16/32/64 */
787 {
788 mmio_op->instr = INSTR_BT;
789 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
790 mmio_op->operand[0] = mk_operand(BYTE, 0, 0, IMMEDIATE);
791 mmio_op->immediate =
792 (signed char)get_immediate(*ad_size, opcode + 1, BYTE);
793 mmio_op->operand[1] = mk_operand(*op_size, 0, 0, MEMORY);
794 return DECODE_success;
795 }
796 else
797 {
798 printk("0f %x, This opcode subtype isn't handled yet\n", *opcode);
799 return DECODE_failure;
800 }
802 default:
803 printk("0f %x, This opcode isn't handled yet\n", *opcode);
804 return DECODE_failure;
805 }
806 }
808 int inst_copy_from_guest(unsigned char *buf, unsigned long guest_eip, int inst_len)
809 {
810 if ( inst_len > MAX_INST_LEN || inst_len <= 0 )
811 return 0;
812 if ( hvm_copy_from_guest_virt(buf, guest_eip, inst_len) )
813 return 0;
814 return inst_len;
815 }
817 void send_pio_req(unsigned long port, unsigned long count, int size,
818 long value, int dir, int df, int value_is_ptr)
819 {
820 struct vcpu *v = current;
821 vcpu_iodata_t *vio;
822 ioreq_t *p;
824 if ( size == 0 || count == 0 ) {
825 printk("null pio request? port %lx, count %lx, "
826 "size %d, value %lx, dir %d, value_is_ptr %d.\n",
827 port, count, size, value, dir, value_is_ptr);
828 }
830 vio = get_vio(v->domain, v->vcpu_id);
831 if ( vio == NULL ) {
832 printk("bad shared page: %lx\n", (unsigned long) vio);
833 domain_crash_synchronous();
834 }
836 p = &vio->vp_ioreq;
837 if ( p->state != STATE_IOREQ_NONE )
838 printk("WARNING: send pio with something already pending (%d)?\n",
839 p->state);
841 p->dir = dir;
842 p->data_is_ptr = value_is_ptr;
844 p->type = IOREQ_TYPE_PIO;
845 p->size = size;
846 p->addr = port;
847 p->count = count;
848 p->df = df;
850 p->io_count++;
852 if ( value_is_ptr ) /* get physical address of data */
853 {
854 if ( hvm_paging_enabled(current) )
855 p->data = paging_gva_to_gpa(current, value);
856 else
857 p->data = value; /* guest VA == guest PA */
858 }
859 else if ( dir == IOREQ_WRITE )
860 p->data = value;
862 if ( hvm_portio_intercept(p) )
863 {
864 p->state = STATE_IORESP_READY;
865 hvm_io_assist(v);
866 return;
867 }
869 hvm_send_assist_req(v);
870 }
872 static void send_mmio_req(unsigned char type, unsigned long gpa,
873 unsigned long count, int size, long value,
874 int dir, int df, int value_is_ptr)
875 {
876 struct vcpu *v = current;
877 vcpu_iodata_t *vio;
878 ioreq_t *p;
880 if ( size == 0 || count == 0 ) {
881 printk("null mmio request? type %d, gpa %lx, "
882 "count %lx, size %d, value %lx, dir %d, value_is_ptr %d.\n",
883 type, gpa, count, size, value, dir, value_is_ptr);
884 }
886 vio = get_vio(v->domain, v->vcpu_id);
887 if (vio == NULL) {
888 printk("bad shared page\n");
889 domain_crash_synchronous();
890 }
892 p = &vio->vp_ioreq;
894 if ( p->state != STATE_IOREQ_NONE )
895 printk("WARNING: send mmio with something already pending (%d)?\n",
896 p->state);
897 p->dir = dir;
898 p->data_is_ptr = value_is_ptr;
900 p->type = type;
901 p->size = size;
902 p->addr = gpa;
903 p->count = count;
904 p->df = df;
906 p->io_count++;
908 if ( value_is_ptr )
909 {
910 if ( hvm_paging_enabled(v) )
911 p->data = paging_gva_to_gpa(v, value);
912 else
913 p->data = value; /* guest VA == guest PA */
914 }
915 else
916 p->data = value;
918 if ( hvm_mmio_intercept(p) || hvm_buffered_io_intercept(p) )
919 {
920 p->state = STATE_IORESP_READY;
921 hvm_io_assist(v);
922 return;
923 }
925 hvm_send_assist_req(v);
926 }
928 static void mmio_operands(int type, unsigned long gpa,
929 struct hvm_io_op *mmio_op,
930 unsigned char op_size)
931 {
932 unsigned long value = 0;
933 int df, index, size_reg;
934 struct cpu_user_regs *regs = &mmio_op->io_context;
936 df = regs->eflags & X86_EFLAGS_DF ? 1 : 0;
938 size_reg = operand_size(mmio_op->operand[0]);
940 if ( mmio_op->operand[0] & REGISTER ) { /* dest is memory */
941 index = operand_index(mmio_op->operand[0]);
942 value = get_reg_value(size_reg, index, 0, regs);
943 send_mmio_req(type, gpa, 1, op_size, value, IOREQ_WRITE, df, 0);
944 } else if ( mmio_op->operand[0] & IMMEDIATE ) { /* dest is memory */
945 value = mmio_op->immediate;
946 send_mmio_req(type, gpa, 1, op_size, value, IOREQ_WRITE, df, 0);
947 } else if ( mmio_op->operand[0] & MEMORY ) { /* dest is register */
948 /* send the request and wait for the value */
949 if ( (mmio_op->instr == INSTR_MOVZX) ||
950 (mmio_op->instr == INSTR_MOVSX) )
951 send_mmio_req(type, gpa, 1, size_reg, 0, IOREQ_READ, df, 0);
952 else
953 send_mmio_req(type, gpa, 1, op_size, 0, IOREQ_READ, df, 0);
954 } else {
955 printk("%s: invalid dest mode.\n", __func__);
956 domain_crash_synchronous();
957 }
958 }
960 #define GET_REPEAT_COUNT() \
961 (mmio_op->flags & REPZ ? (ad_size == WORD ? regs->ecx & 0xFFFF : regs->ecx) : 1)
963 void handle_mmio(unsigned long gpa)
964 {
965 unsigned long inst_addr;
966 struct hvm_io_op *mmio_op;
967 struct cpu_user_regs *regs;
968 unsigned char inst[MAX_INST_LEN], ad_size, op_size, seg_sel;
969 int i, address_bytes, df, inst_len;
970 struct vcpu *v = current;
972 mmio_op = &v->arch.hvm_vcpu.io_op;
973 regs = &mmio_op->io_context;
975 /* Copy current guest state into io instruction state structure. */
976 memcpy(regs, guest_cpu_user_regs(), HVM_CONTEXT_STACK_BYTES);
977 hvm_store_cpu_guest_regs(v, regs, NULL);
979 df = regs->eflags & X86_EFLAGS_DF ? 1 : 0;
981 address_bytes = hvm_guest_x86_mode(v);
982 inst_addr = hvm_get_segment_base(v, x86_seg_cs) + regs->eip;
983 inst_len = hvm_instruction_length(inst_addr, address_bytes);
984 if ( inst_len <= 0 )
985 {
986 printk("handle_mmio: failed to get instruction length\n");
987 domain_crash_synchronous();
988 }
990 memset(inst, 0, MAX_INST_LEN);
991 if ( inst_copy_from_guest(inst, inst_addr, inst_len) != inst_len ) {
992 printk("handle_mmio: failed to copy instruction\n");
993 domain_crash_synchronous();
994 }
996 if ( mmio_decode(address_bytes, inst, mmio_op, &ad_size,
997 &op_size, &seg_sel) == DECODE_failure ) {
998 printk("handle_mmio: failed to decode instruction\n");
999 printk("mmio opcode: gpa 0x%lx, len %d:", gpa, inst_len);
1000 for ( i = 0; i < inst_len; i++ )
1001 printk(" %02x", inst[i] & 0xFF);
1002 printk("\n");
1003 domain_crash_synchronous();
1006 regs->eip += inst_len; /* advance %eip */
1008 switch ( mmio_op->instr ) {
1009 case INSTR_MOV:
1010 mmio_operands(IOREQ_TYPE_COPY, gpa, mmio_op, op_size);
1011 break;
1013 case INSTR_MOVS:
1015 unsigned long count = GET_REPEAT_COUNT();
1016 int sign = regs->eflags & X86_EFLAGS_DF ? -1 : 1;
1017 unsigned long addr;
1018 int dir, size = op_size;
1020 ASSERT(count);
1022 /* determine non-MMIO address */
1023 addr = regs->edi;
1024 if ( ad_size == WORD )
1025 addr &= 0xFFFF;
1026 addr += hvm_get_segment_base(v, x86_seg_es);
1027 if ( paging_gva_to_gpa(v, addr) == gpa )
1029 enum x86_segment seg;
1031 dir = IOREQ_WRITE;
1032 addr = regs->esi;
1033 if ( ad_size == WORD )
1034 addr &= 0xFFFF;
1035 switch ( seg_sel )
1037 case 0x26: seg = x86_seg_es; break;
1038 case 0x2e: seg = x86_seg_cs; break;
1039 case 0x36: seg = x86_seg_ss; break;
1040 case 0:
1041 case 0x3e: seg = x86_seg_ds; break;
1042 case 0x64: seg = x86_seg_fs; break;
1043 case 0x65: seg = x86_seg_gs; break;
1044 default: domain_crash_synchronous();
1046 addr += hvm_get_segment_base(v, seg);
1048 else
1049 dir = IOREQ_READ;
1051 if ( addr & (size - 1) )
1052 gdprintk(XENLOG_WARNING,
1053 "Unaligned ioport access: %lx, %d\n", addr, size);
1055 /*
1056 * In case of a movs spanning multiple pages, we break the accesses
1057 * up into multiple pages (the device model works with non-continguous
1058 * physical guest pages). To copy just one page, we adjust %ecx and
1059 * do not advance %eip so that the next rep;movs copies the next page.
1060 * Unaligned accesses, for example movsl starting at PGSZ-2, are
1061 * turned into a single copy where we handle the overlapping memory
1062 * copy ourself. After this copy succeeds, "rep movs" is executed
1063 * again.
1064 */
1065 if ( (addr & PAGE_MASK) != ((addr + size - 1) & PAGE_MASK) ) {
1066 unsigned long value = 0;
1068 gdprintk(XENLOG_WARNING,
1069 "Single io request in a movs crossing page boundary.\n");
1070 mmio_op->flags |= OVERLAP;
1072 if ( dir == IOREQ_WRITE ) {
1073 if ( hvm_paging_enabled(v) )
1074 (void)hvm_copy_from_guest_virt(&value, addr, size);
1075 else
1076 (void)hvm_copy_from_guest_phys(&value, addr, size);
1077 } else
1078 mmio_op->addr = addr;
1080 if ( count != 1 )
1081 regs->eip -= inst_len; /* do not advance %eip */
1083 send_mmio_req(IOREQ_TYPE_COPY, gpa, 1, size, value, dir, df, 0);
1084 } else {
1085 unsigned long last_addr = sign > 0 ? addr + count * size - 1
1086 : addr - (count - 1) * size;
1088 if ( (addr & PAGE_MASK) != (last_addr & PAGE_MASK) )
1090 regs->eip -= inst_len; /* do not advance %eip */
1092 if ( sign > 0 )
1093 count = (PAGE_SIZE - (addr & ~PAGE_MASK)) / size;
1094 else
1095 count = (addr & ~PAGE_MASK) / size + 1;
1098 ASSERT(count);
1100 send_mmio_req(IOREQ_TYPE_COPY, gpa, count, size, addr, dir, df, 1);
1102 break;
1105 case INSTR_MOVZX:
1106 case INSTR_MOVSX:
1107 mmio_operands(IOREQ_TYPE_COPY, gpa, mmio_op, op_size);
1108 break;
1110 case INSTR_STOS:
1111 /*
1112 * Since the destination is always in (contiguous) mmio space we don't
1113 * need to break it up into pages.
1114 */
1115 send_mmio_req(IOREQ_TYPE_COPY, gpa,
1116 GET_REPEAT_COUNT(), op_size, regs->eax, IOREQ_WRITE, df, 0);
1117 break;
1119 case INSTR_LODS:
1120 /*
1121 * Since the source is always in (contiguous) mmio space we don't
1122 * need to break it up into pages.
1123 */
1124 send_mmio_req(IOREQ_TYPE_COPY, gpa,
1125 GET_REPEAT_COUNT(), op_size, 0, IOREQ_READ, df, 0);
1126 break;
1128 case INSTR_OR:
1129 mmio_operands(IOREQ_TYPE_OR, gpa, mmio_op, op_size);
1130 break;
1132 case INSTR_AND:
1133 mmio_operands(IOREQ_TYPE_AND, gpa, mmio_op, op_size);
1134 break;
1136 case INSTR_ADD:
1137 mmio_operands(IOREQ_TYPE_ADD, gpa, mmio_op, op_size);
1138 break;
1140 case INSTR_XOR:
1141 mmio_operands(IOREQ_TYPE_XOR, gpa, mmio_op, op_size);
1142 break;
1144 case INSTR_PUSH:
1145 if ( ad_size == WORD )
1147 mmio_op->addr = (uint16_t)(regs->esp - op_size);
1148 regs->esp = mmio_op->addr | (regs->esp & ~0xffff);
1150 else
1152 regs->esp -= op_size;
1153 mmio_op->addr = regs->esp;
1155 /* send the request and wait for the value */
1156 send_mmio_req(IOREQ_TYPE_COPY, gpa, 1, op_size, 0, IOREQ_READ, df, 0);
1157 break;
1159 case INSTR_CMP: /* Pass through */
1160 case INSTR_TEST:
1161 case INSTR_SUB:
1162 /* send the request and wait for the value */
1163 send_mmio_req(IOREQ_TYPE_COPY, gpa, 1, op_size, 0, IOREQ_READ, df, 0);
1164 break;
1166 case INSTR_BT:
1168 unsigned long value = 0;
1169 int index, size;
1171 if ( mmio_op->operand[0] & REGISTER )
1173 index = operand_index(mmio_op->operand[0]);
1174 size = operand_size(mmio_op->operand[0]);
1175 value = get_reg_value(size, index, 0, regs);
1177 else if ( mmio_op->operand[0] & IMMEDIATE )
1179 mmio_op->immediate = mmio_op->immediate;
1180 value = mmio_op->immediate;
1182 send_mmio_req(IOREQ_TYPE_COPY, gpa + (value >> 5), 1,
1183 op_size, 0, IOREQ_READ, df, 0);
1184 break;
1187 case INSTR_XCHG:
1188 if ( mmio_op->operand[0] & REGISTER ) {
1189 long value;
1190 unsigned long operand = mmio_op->operand[0];
1191 value = get_reg_value(operand_size(operand),
1192 operand_index(operand), 0,
1193 regs);
1194 /* send the request and wait for the value */
1195 send_mmio_req(IOREQ_TYPE_XCHG, gpa, 1,
1196 op_size, value, IOREQ_WRITE, df, 0);
1197 } else {
1198 /* the destination is a register */
1199 long value;
1200 unsigned long operand = mmio_op->operand[1];
1201 value = get_reg_value(operand_size(operand),
1202 operand_index(operand), 0,
1203 regs);
1204 /* send the request and wait for the value */
1205 send_mmio_req(IOREQ_TYPE_XCHG, gpa, 1,
1206 op_size, value, IOREQ_WRITE, df, 0);
1208 break;
1210 default:
1211 printk("Unhandled MMIO instruction\n");
1212 domain_crash_synchronous();
1216 DEFINE_PER_CPU(int, guest_handles_in_xen_space);
1218 /* Note that copy_{to,from}_user_hvm don't set the A and D bits on
1219 PTEs, and require the PTE to be writable even when they're only
1220 trying to read from it. The guest is expected to deal with
1221 this. */
1222 unsigned long copy_to_user_hvm(void *to, const void *from, unsigned len)
1224 if ( this_cpu(guest_handles_in_xen_space) )
1226 memcpy(to, from, len);
1227 return 0;
1230 return hvm_copy_to_guest_virt((unsigned long)to, (void *)from, len);
1233 unsigned long copy_from_user_hvm(void *to, const void *from, unsigned len)
1235 if ( this_cpu(guest_handles_in_xen_space) )
1237 memcpy(to, from, len);
1238 return 0;
1241 return hvm_copy_from_guest_virt(to, (unsigned long)from, len);
1244 /*
1245 * Local variables:
1246 * mode: C
1247 * c-set-style: "BSD"
1248 * c-basic-offset: 4
1249 * tab-width: 4
1250 * indent-tabs-mode: nil
1251 * End:
1252 */