direct-io.hg

view extras/mini-os/minios-x86_64.lds @ 10734:9b7e1ea4c4d2

[HVM] Sync p2m table across all vcpus on x86_32p xen.
We found VGA acceleration can not work on SMP VMX guests on x86_32p
xen, this is caused by the way we construct p2m table today: only the 1st
l2 page table slot that maps p2m table pages is copied to none-vcpu0 vcpu
monitor page table when VMX is created. But VGA acceleration will
create some p2m table entries beyond the 1st l2 page table slot after HVM is
created, so only vcpu0 can get these p2m entries, and other vcpu can
not do VGA acceleration.

Signed-off-by: Xin Li <xin.b.li@intel.com>
author kfraser@localhost.localdomain
date Wed Jul 26 11:34:12 2006 +0100 (2006-07-26)
parents b3b5f3ff2100
children
line source
1 OUTPUT_FORMAT("elf64-x86-64", "elf64-x86-64", "elf64-x86-64")
2 OUTPUT_ARCH(i386:x86-64)
3 ENTRY(_start)
4 SECTIONS
5 {
6 . = 0x0;
7 _text = .; /* Text and read-only data */
8 .text : {
9 *(.text)
10 *(.gnu.warning)
11 } = 0x9090
13 _etext = .; /* End of text section */
15 .rodata : { *(.rodata) *(.rodata.*) }
17 .data : { /* Data */
18 *(.data)
19 CONSTRUCTORS
20 }
22 _edata = .; /* End of data section */
24 . = ALIGN(8192); /* init_task */
25 .data.init_task : { *(.data.init_task) }
27 . = ALIGN(4096);
28 .data.page_aligned : { *(.data.idt) }
30 . = ALIGN(32);
31 .data.cacheline_aligned : { *(.data.cacheline_aligned) }
33 __bss_start = .; /* BSS */
34 .bss : {
35 *(.bss)
36 }
37 _end = . ;
39 /* Sections to be discarded */
40 /DISCARD/ : {
41 *(.text.exit)
42 *(.data.exit)
43 *(.exitcall.exit)
44 }
46 /* Stabs debugging sections. */
47 .stab 0 : { *(.stab) }
48 .stabstr 0 : { *(.stabstr) }
49 .stab.excl 0 : { *(.stab.excl) }
50 .stab.exclstr 0 : { *(.stab.exclstr) }
51 .stab.index 0 : { *(.stab.index) }
52 .stab.indexstr 0 : { *(.stab.indexstr) }
53 .comment 0 : { *(.comment) }
54 }