direct-io.hg

view xen/include/asm-ia64/vmx_vpd.h @ 12411:622bb65e2011

[IA64] Accelerate RSM, SSM and MOV_TO_PSR

Signed-off-by: Anthony Xu <anthony.xu@intel.com>
author awilliam@xenbuild.aw
date Sun Oct 29 11:18:17 2006 -0700 (2006-10-29)
parents 1612675ca4cf
children ebed72718263
line source
1 /* -*- Mode:C; c-basic-offset:4; tab-width:4; indent-tabs-mode:nil -*- */
2 /*
3 * vmx.h: prototype for generial vmx related interface
4 * Copyright (c) 2004, Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
17 * Place - Suite 330, Boston, MA 02111-1307 USA.
18 *
19 * Kun Tian (Kevin Tian) (kevin.tian@intel.com)
20 */
22 #ifndef _ASM_IA64_VMX_VPD_H_
23 #define _ASM_IA64_VMX_VPD_H_
25 #ifndef __ASSEMBLY__
27 #include <asm/vtm.h>
28 #include <asm/vmx_platform.h>
29 #include <public/xen.h>
30 #include <xen/spinlock.h>
32 #define VPD_SHIFT 17 /* 128K requirement */
33 #define VPD_SIZE (1 << VPD_SHIFT)
35 typedef struct {
36 unsigned long dcr; // CR0
37 unsigned long itm;
38 unsigned long iva;
39 unsigned long rsv1[5];
40 unsigned long pta; // CR8
41 unsigned long rsv2[7];
42 unsigned long ipsr; // CR16
43 unsigned long isr;
44 unsigned long rsv3;
45 unsigned long iip;
46 unsigned long ifa;
47 unsigned long itir;
48 unsigned long iipa;
49 unsigned long ifs;
50 unsigned long iim; // CR24
51 unsigned long iha;
52 unsigned long rsv4[38];
53 unsigned long lid; // CR64
54 unsigned long ivr;
55 unsigned long tpr;
56 unsigned long eoi;
57 unsigned long irr[4];
58 unsigned long itv; // CR72
59 unsigned long pmv;
60 unsigned long cmcv;
61 unsigned long rsv5[5];
62 unsigned long lrr0; // CR80
63 unsigned long lrr1;
64 unsigned long rsv6[46];
65 } cr_t;
67 #ifdef VTI_DEBUG
68 struct ivt_debug{
69 unsigned long iip;
70 unsigned long ipsr;
71 unsigned long ifa;
72 unsigned long vector;
73 };
74 #define IVT_DEBUG_MAX 128
75 #endif
77 struct arch_vmx_domain {
78 spinlock_t virq_assist_lock; /* spinlock for pass virq */
79 };
81 struct arch_vmx_struct {
82 // vpd_t *vpd;
83 vtime_t vtm;
84 struct vlapic vlapic;
85 unsigned long vrr[8];
86 /* if the corresponding bit is 1, then this page size is
87 used in this region */
88 unsigned long psbits[8];
89 unsigned long vkr[8];
90 unsigned long cr_iipa; /* for emulation */
91 unsigned long cr_isr; /* for emulation */
92 unsigned long cause;
93 unsigned long opcode;
95 // unsigned long mrr5;
96 // unsigned long mrr6;
97 // unsigned long mrr7;
98 unsigned long mdcr;
99 unsigned long mpta;
100 // unsigned long rfi_pfs;
101 // unsigned long rfi_iip;
102 // unsigned long rfi_ipsr;
103 // unsigned long rfi_ifs;
104 // unsigned long in_service[4]; // vLsapic inservice IRQ bits
105 unsigned long flags;
106 unsigned long xen_port;
107 #ifdef VTI_DEBUG
108 unsigned long ivt_current;
109 struct ivt_debug ivt_debug[IVT_DEBUG_MAX];
110 #endif
111 };
113 #define vmx_schedule_tail(next) \
114 (next)->thread.arch_vmx.arch_vmx_schedule_tail((next))
116 #define VMX_DOMAIN(v) v->arch.arch_vmx.flags
118 #define ARCH_VMX_IO_WAIT 3 /* Waiting for I/O completion */
119 #define ARCH_VMX_INTR_ASSIST 4 /* Need DM's assist to issue intr */
120 #define ARCH_VMX_DOMAIN 5 /* Need it to indicate VTi domain */
123 #define VMX_DEBUG 1
124 #if VMX_DEBUG
126 extern unsigned int opt_vmx_debug_level;
127 #endif
128 #endif //__ASSEMBLY__
130 // VPD field offset
131 #define VPD_VAC_START_OFFSET 0
132 #define VPD_VDC_START_OFFSET 8
133 #define VPD_VHPI_START_OFFSET 256
134 #define VPD_VGR_START_OFFSET 1024
135 #define VPD_VBGR_START_OFFSET 1152
136 #define VPD_VNAT_START_OFFSET 1280
137 #define VPD_VBNAT_START_OFFSET 1288
138 #define VPD_VCPUID_START_OFFSET 1296
139 #define VPD_VPSR_START_OFFSET 1424
140 #define VPD_VPR_START_OFFSET 1432
141 #define VPD_VRSE_CFLE_START_OFFSET 1440
142 #define VPD_VCR_START_OFFSET 2048
143 #define VPD_VTPR_START_OFFSET 2576
144 #define VPD_VRR_START_OFFSET 3072
145 #define VPD_VMM_VAIL_START_OFFSET 31744
148 #endif /* _ASM_IA64_VMX_VPD_H_ */