direct-io.hg

view xen/arch/ia64/asm-offsets.c @ 12431:4816a891b3d6

[IA64] Fix SMP Windows boot failure

Sometime SMP Windows can't boot, the root cause is guest timer interrupt
is lost.

This patch fixes following issues.
1. Windows uses different way to sync itc.
2. Previously when Guest timer fires and guest ITV is masked, XEN will
desert this Guest timer interrupt. It is not correct for windows,
windows may expect this timer interrupt.
3. Windows may use different way to set timer in some situations.
Windows first sets itm (which may be smaller than current itc), and
then sets itc (which is samller than itm).
XEN can support this way to set timer.

Signed-off-by: Anthony Xu <anthony.xu@intel.com>
author awilliam@xenbuild.aw
date Fri Nov 10 11:19:57 2006 -0700 (2006-11-10)
parents c8fa605f131f
children 05d227d81935
line source
1 /*
2 * Generate definitions needed by assembly language modules.
3 * This code generates raw asm output which is post-processed
4 * to extract and format the required data.
5 */
7 #include <xen/config.h>
8 #include <xen/sched.h>
9 #include <asm/processor.h>
10 #include <asm/ptrace.h>
11 #include <asm/mca.h>
12 #include <public/xen.h>
13 #include <asm/tlb.h>
14 #include <asm/regs.h>
16 #define task_struct vcpu
18 #define DEFINE(sym, val) \
19 asm volatile("\n->" #sym " (%0) " #val : : "i" (val))
21 #define BLANK() asm volatile("\n->" : : )
23 #define OFFSET(_sym, _str, _mem) \
24 DEFINE(_sym, offsetof(_str, _mem));
26 void foo(void)
27 {
28 DEFINE(IA64_TASK_SIZE, sizeof (struct task_struct));
29 DEFINE(IA64_THREAD_INFO_SIZE, sizeof (struct thread_info));
30 DEFINE(IA64_PT_REGS_SIZE, sizeof (struct pt_regs));
31 DEFINE(IA64_SWITCH_STACK_SIZE, sizeof (struct switch_stack));
32 DEFINE(IA64_CPU_SIZE, sizeof (struct cpuinfo_ia64));
33 DEFINE(UNW_FRAME_INFO_SIZE, sizeof (struct unw_frame_info));
34 DEFINE(MAPPED_REGS_T_SIZE, sizeof (mapped_regs_t));
36 BLANK();
37 DEFINE(IA64_MCA_CPU_INIT_STACK_OFFSET, offsetof (struct ia64_mca_cpu, init_stack));
39 BLANK();
40 DEFINE(VCPU_VTM_OFFSET_OFS, offsetof(struct vcpu, arch.arch_vmx.vtm.vtm_offset));
41 DEFINE(VCPU_VTM_LAST_ITC_OFS, offsetof(struct vcpu, arch.arch_vmx.vtm.last_itc));
42 DEFINE(VCPU_VRR0_OFS, offsetof(struct vcpu, arch.arch_vmx.vrr[0]));
43 #ifdef VTI_DEBUG
44 DEFINE(IVT_CUR_OFS, offsetof(struct vcpu, arch.arch_vmx.ivt_current));
45 DEFINE(IVT_DBG_OFS, offsetof(struct vcpu, arch.arch_vmx.ivt_debug));
46 #endif
47 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
48 DEFINE(TI_PRE_COUNT, offsetof(struct thread_info, preempt_count));
50 BLANK();
52 DEFINE(IA64_TASK_THREAD_KSP_OFFSET, offsetof (struct vcpu, arch._thread.ksp));
53 DEFINE(IA64_TASK_THREAD_ON_USTACK_OFFSET, offsetof (struct vcpu, arch._thread.on_ustack));
55 DEFINE(IA64_VCPU_DOMAIN_OFFSET, offsetof (struct vcpu, domain));
56 DEFINE(IA64_VCPU_META_RR0_OFFSET, offsetof (struct vcpu, arch.metaphysical_rr0));
57 DEFINE(IA64_VCPU_META_SAVED_RR0_OFFSET, offsetof (struct vcpu, arch.metaphysical_saved_rr0));
58 DEFINE(IA64_VCPU_BREAKIMM_OFFSET, offsetof (struct vcpu, arch.breakimm));
59 DEFINE(IA64_VCPU_IVA_OFFSET, offsetof (struct vcpu, arch.iva));
60 DEFINE(IA64_VCPU_IRR0_OFFSET, offsetof (struct vcpu, arch.irr[0]));
61 DEFINE(IA64_VCPU_IRR3_OFFSET, offsetof (struct vcpu, arch.irr[3]));
62 DEFINE(IA64_VCPU_INSVC3_OFFSET, offsetof (struct vcpu, arch.insvc[3]));
63 DEFINE(IA64_VCPU_STARTING_RID_OFFSET, offsetof (struct vcpu, arch.starting_rid));
64 DEFINE(IA64_VCPU_ENDING_RID_OFFSET, offsetof (struct vcpu, arch.ending_rid));
65 DEFINE(IA64_VCPU_DOMAIN_ITM_OFFSET, offsetof (struct vcpu, arch.domain_itm));
66 DEFINE(IA64_VCPU_DOMAIN_ITM_LAST_OFFSET, offsetof (struct vcpu, arch.domain_itm_last));
67 DEFINE(IA64_VCPU_ITLB_OFFSET, offsetof (struct vcpu, arch.itlb));
68 DEFINE(IA64_VCPU_DTLB_OFFSET, offsetof (struct vcpu, arch.dtlb));
70 BLANK();
72 DEFINE(IA64_DOMAIN_SHADOW_BITMAP_OFFSET, offsetof (struct domain, arch.shadow_bitmap));
74 BLANK();
76 DEFINE(IA64_CPUINFO_ITM_NEXT_OFFSET, offsetof (struct cpuinfo_ia64, itm_next));
77 DEFINE(IA64_CPUINFO_KSOFTIRQD_OFFSET, offsetof (struct cpuinfo_ia64, ksoftirqd));
80 BLANK();
82 DEFINE(IA64_PT_REGS_B6_OFFSET, offsetof (struct pt_regs, b6));
83 DEFINE(IA64_PT_REGS_B7_OFFSET, offsetof (struct pt_regs, b7));
84 DEFINE(IA64_PT_REGS_AR_CSD_OFFSET, offsetof (struct pt_regs, ar_csd));
85 DEFINE(IA64_PT_REGS_AR_SSD_OFFSET, offsetof (struct pt_regs, ar_ssd));
86 DEFINE(IA64_PT_REGS_R8_OFFSET, offsetof (struct pt_regs, r8));
87 DEFINE(IA64_PT_REGS_R9_OFFSET, offsetof (struct pt_regs, r9));
88 DEFINE(IA64_PT_REGS_R10_OFFSET, offsetof (struct pt_regs, r10));
89 DEFINE(IA64_PT_REGS_R11_OFFSET, offsetof (struct pt_regs, r11));
90 DEFINE(IA64_PT_REGS_CR_IPSR_OFFSET, offsetof (struct pt_regs, cr_ipsr));
91 DEFINE(IA64_PT_REGS_CR_IIP_OFFSET, offsetof (struct pt_regs, cr_iip));
92 DEFINE(IA64_PT_REGS_CR_IFS_OFFSET, offsetof (struct pt_regs, cr_ifs));
93 DEFINE(IA64_PT_REGS_AR_UNAT_OFFSET, offsetof (struct pt_regs, ar_unat));
94 DEFINE(IA64_PT_REGS_AR_PFS_OFFSET, offsetof (struct pt_regs, ar_pfs));
95 DEFINE(IA64_PT_REGS_AR_RSC_OFFSET, offsetof (struct pt_regs, ar_rsc));
96 DEFINE(IA64_PT_REGS_AR_RNAT_OFFSET, offsetof (struct pt_regs, ar_rnat));
98 DEFINE(IA64_PT_REGS_AR_BSPSTORE_OFFSET, offsetof (struct pt_regs, ar_bspstore));
99 DEFINE(IA64_PT_REGS_PR_OFFSET, offsetof (struct pt_regs, pr));
100 DEFINE(IA64_PT_REGS_B0_OFFSET, offsetof (struct pt_regs, b0));
101 DEFINE(IA64_PT_REGS_LOADRS_OFFSET, offsetof (struct pt_regs, loadrs));
102 DEFINE(IA64_PT_REGS_R1_OFFSET, offsetof (struct pt_regs, r1));
103 DEFINE(IA64_PT_REGS_R12_OFFSET, offsetof (struct pt_regs, r12));
104 DEFINE(IA64_PT_REGS_R13_OFFSET, offsetof (struct pt_regs, r13));
105 DEFINE(IA64_PT_REGS_AR_FPSR_OFFSET, offsetof (struct pt_regs, ar_fpsr));
106 DEFINE(IA64_PT_REGS_R15_OFFSET, offsetof (struct pt_regs, r15));
107 DEFINE(IA64_PT_REGS_R14_OFFSET, offsetof (struct pt_regs, r14));
108 DEFINE(IA64_PT_REGS_R2_OFFSET, offsetof (struct pt_regs, r2));
109 DEFINE(IA64_PT_REGS_R3_OFFSET, offsetof (struct pt_regs, r3));
110 DEFINE(IA64_PT_REGS_R16_OFFSET, offsetof (struct pt_regs, r16));
111 DEFINE(IA64_PT_REGS_R17_OFFSET, offsetof (struct pt_regs, r17));
112 DEFINE(IA64_PT_REGS_R18_OFFSET, offsetof (struct pt_regs, r18));
113 DEFINE(IA64_PT_REGS_R19_OFFSET, offsetof (struct pt_regs, r19));
114 DEFINE(IA64_PT_REGS_R20_OFFSET, offsetof (struct pt_regs, r20));
115 DEFINE(IA64_PT_REGS_R21_OFFSET, offsetof (struct pt_regs, r21));
116 DEFINE(IA64_PT_REGS_R22_OFFSET, offsetof (struct pt_regs, r22));
117 DEFINE(IA64_PT_REGS_R23_OFFSET, offsetof (struct pt_regs, r23));
118 DEFINE(IA64_PT_REGS_R24_OFFSET, offsetof (struct pt_regs, r24));
119 DEFINE(IA64_PT_REGS_R25_OFFSET, offsetof (struct pt_regs, r25));
120 DEFINE(IA64_PT_REGS_R26_OFFSET, offsetof (struct pt_regs, r26));
121 DEFINE(IA64_PT_REGS_R27_OFFSET, offsetof (struct pt_regs, r27));
122 DEFINE(IA64_PT_REGS_R28_OFFSET, offsetof (struct pt_regs, r28));
123 DEFINE(IA64_PT_REGS_R29_OFFSET, offsetof (struct pt_regs, r29));
124 DEFINE(IA64_PT_REGS_R30_OFFSET, offsetof (struct pt_regs, r30));
125 DEFINE(IA64_PT_REGS_R31_OFFSET, offsetof (struct pt_regs, r31));
126 DEFINE(IA64_PT_REGS_AR_CCV_OFFSET, offsetof (struct pt_regs, ar_ccv));
127 DEFINE(IA64_PT_REGS_F6_OFFSET, offsetof (struct pt_regs, f6));
128 DEFINE(IA64_PT_REGS_F7_OFFSET, offsetof (struct pt_regs, f7));
129 DEFINE(IA64_PT_REGS_F8_OFFSET, offsetof (struct pt_regs, f8));
130 DEFINE(IA64_PT_REGS_F9_OFFSET, offsetof (struct pt_regs, f9));
131 DEFINE(IA64_PT_REGS_F10_OFFSET, offsetof (struct pt_regs, f10));
132 DEFINE(IA64_PT_REGS_F11_OFFSET, offsetof (struct pt_regs, f11));
133 DEFINE(IA64_PT_REGS_R4_OFFSET, offsetof (struct pt_regs, r4));
134 DEFINE(IA64_PT_REGS_R5_OFFSET, offsetof (struct pt_regs, r5));
135 DEFINE(IA64_PT_REGS_R6_OFFSET, offsetof (struct pt_regs, r6));
136 DEFINE(IA64_PT_REGS_R7_OFFSET, offsetof (struct pt_regs, r7));
137 DEFINE(IA64_PT_REGS_EML_UNAT_OFFSET, offsetof (struct pt_regs, eml_unat));
138 DEFINE(IA64_VCPU_IIPA_OFFSET, offsetof (struct vcpu, arch.arch_vmx.cr_iipa));
139 DEFINE(IA64_VCPU_ISR_OFFSET, offsetof (struct vcpu, arch.arch_vmx.cr_isr));
140 DEFINE(IA64_VCPU_CAUSE_OFFSET, offsetof (struct vcpu, arch.arch_vmx.cause));
141 DEFINE(IA64_VCPU_OPCODE_OFFSET, offsetof (struct vcpu, arch.arch_vmx.opcode));
142 DEFINE(SWITCH_MPTA_OFFSET,offsetof(struct vcpu ,arch.arch_vmx.mpta));
143 DEFINE(IA64_PT_REGS_R16_SLOT, (((offsetof(struct pt_regs, r16)-sizeof(struct pt_regs))>>3)&0x3f));
144 DEFINE(IA64_VCPU_FLAGS_OFFSET,offsetof(struct vcpu ,arch.arch_vmx.flags));
145 DEFINE(IA64_VCPU_MODE_FLAGS_OFFSET,offsetof(struct vcpu, arch.mode_flags));
147 BLANK();
149 DEFINE(IA64_SWITCH_STACK_CALLER_UNAT_OFFSET, offsetof (struct switch_stack, caller_unat));
150 DEFINE(IA64_SWITCH_STACK_AR_FPSR_OFFSET, offsetof (struct switch_stack, ar_fpsr));
151 DEFINE(IA64_SWITCH_STACK_F2_OFFSET, offsetof (struct switch_stack, f2));
152 DEFINE(IA64_SWITCH_STACK_F3_OFFSET, offsetof (struct switch_stack, f3));
153 DEFINE(IA64_SWITCH_STACK_F4_OFFSET, offsetof (struct switch_stack, f4));
154 DEFINE(IA64_SWITCH_STACK_F5_OFFSET, offsetof (struct switch_stack, f5));
155 DEFINE(IA64_SWITCH_STACK_F12_OFFSET, offsetof (struct switch_stack, f12));
156 DEFINE(IA64_SWITCH_STACK_F13_OFFSET, offsetof (struct switch_stack, f13));
157 DEFINE(IA64_SWITCH_STACK_F14_OFFSET, offsetof (struct switch_stack, f14));
158 DEFINE(IA64_SWITCH_STACK_F15_OFFSET, offsetof (struct switch_stack, f15));
159 DEFINE(IA64_SWITCH_STACK_F16_OFFSET, offsetof (struct switch_stack, f16));
160 DEFINE(IA64_SWITCH_STACK_F17_OFFSET, offsetof (struct switch_stack, f17));
161 DEFINE(IA64_SWITCH_STACK_F18_OFFSET, offsetof (struct switch_stack, f18));
162 DEFINE(IA64_SWITCH_STACK_F19_OFFSET, offsetof (struct switch_stack, f19));
163 DEFINE(IA64_SWITCH_STACK_F20_OFFSET, offsetof (struct switch_stack, f20));
164 DEFINE(IA64_SWITCH_STACK_F21_OFFSET, offsetof (struct switch_stack, f21));
165 DEFINE(IA64_SWITCH_STACK_F22_OFFSET, offsetof (struct switch_stack, f22));
166 DEFINE(IA64_SWITCH_STACK_F23_OFFSET, offsetof (struct switch_stack, f23));
167 DEFINE(IA64_SWITCH_STACK_F24_OFFSET, offsetof (struct switch_stack, f24));
168 DEFINE(IA64_SWITCH_STACK_F25_OFFSET, offsetof (struct switch_stack, f25));
169 DEFINE(IA64_SWITCH_STACK_F26_OFFSET, offsetof (struct switch_stack, f26));
170 DEFINE(IA64_SWITCH_STACK_F27_OFFSET, offsetof (struct switch_stack, f27));
171 DEFINE(IA64_SWITCH_STACK_F28_OFFSET, offsetof (struct switch_stack, f28));
172 DEFINE(IA64_SWITCH_STACK_F29_OFFSET, offsetof (struct switch_stack, f29));
173 DEFINE(IA64_SWITCH_STACK_F30_OFFSET, offsetof (struct switch_stack, f30));
174 DEFINE(IA64_SWITCH_STACK_F31_OFFSET, offsetof (struct switch_stack, f31));
175 DEFINE(IA64_SWITCH_STACK_R4_OFFSET, offsetof (struct switch_stack, r4));
176 DEFINE(IA64_SWITCH_STACK_R5_OFFSET, offsetof (struct switch_stack, r5));
177 DEFINE(IA64_SWITCH_STACK_R6_OFFSET, offsetof (struct switch_stack, r6));
178 DEFINE(IA64_SWITCH_STACK_R7_OFFSET, offsetof (struct switch_stack, r7));
179 DEFINE(IA64_SWITCH_STACK_B0_OFFSET, offsetof (struct switch_stack, b0));
180 DEFINE(IA64_SWITCH_STACK_B1_OFFSET, offsetof (struct switch_stack, b1));
181 DEFINE(IA64_SWITCH_STACK_B2_OFFSET, offsetof (struct switch_stack, b2));
182 DEFINE(IA64_SWITCH_STACK_B3_OFFSET, offsetof (struct switch_stack, b3));
183 DEFINE(IA64_SWITCH_STACK_B4_OFFSET, offsetof (struct switch_stack, b4));
184 DEFINE(IA64_SWITCH_STACK_B5_OFFSET, offsetof (struct switch_stack, b5));
185 DEFINE(IA64_SWITCH_STACK_AR_PFS_OFFSET, offsetof (struct switch_stack, ar_pfs));
186 DEFINE(IA64_SWITCH_STACK_AR_LC_OFFSET, offsetof (struct switch_stack, ar_lc));
187 DEFINE(IA64_SWITCH_STACK_AR_UNAT_OFFSET, offsetof (struct switch_stack, ar_unat));
188 DEFINE(IA64_SWITCH_STACK_AR_RNAT_OFFSET, offsetof (struct switch_stack, ar_rnat));
189 DEFINE(IA64_SWITCH_STACK_AR_BSPSTORE_OFFSET, offsetof (struct switch_stack, ar_bspstore));
190 DEFINE(IA64_SWITCH_STACK_PR_OFFSET, offsetof (struct switch_stack, pr));
192 BLANK();
194 DEFINE(IA64_VPD_BASE_OFFSET, offsetof (struct vcpu, arch.privregs));
195 DEFINE(IA64_VPD_VIFS_OFFSET, offsetof (mapped_regs_t, ifs));
196 DEFINE(IA64_VLSAPIC_INSVC_BASE_OFFSET, offsetof (struct vcpu, arch.insvc[0]));
197 DEFINE(IA64_VPD_CR_VPTA_OFFSET, offsetof (cr_t, pta));
198 DEFINE(XXX_THASH_SIZE, sizeof (thash_data_t));
200 BLANK();
201 DEFINE(IA64_CPUINFO_NSEC_PER_CYC_OFFSET, offsetof (struct cpuinfo_ia64, nsec_per_cyc));
202 DEFINE(IA64_TIMESPEC_TV_NSEC_OFFSET, offsetof (struct timespec, tv_nsec));
205 DEFINE(CLONE_IDLETASK_BIT, 12);
206 DEFINE(CLONE_SETTLS_BIT, 19);
207 DEFINE(IA64_CPUINFO_NSEC_PER_CYC_OFFSET, offsetof (struct cpuinfo_ia64, nsec_per_cyc));
209 BLANK();
210 DEFINE(IA64_KR_CURRENT_OFFSET, offsetof (cpu_kr_ia64_t, _kr[IA64_KR_CURRENT]));
211 DEFINE(IA64_KR_PT_BASE_OFFSET, offsetof (cpu_kr_ia64_t, _kr[IA64_KR_PT_BASE]));
212 DEFINE(IA64_KR_IO_BASE_OFFSET, offsetof (cpu_kr_ia64_t, _kr[IA64_KR_IO_BASE]));
213 DEFINE(IA64_KR_PERCPU_DATA_OFFSET, offsetof (cpu_kr_ia64_t, _kr[IA64_KR_PER_CPU_DATA]));
214 DEFINE(IA64_KR_IO_BASE_OFFSET, offsetof (cpu_kr_ia64_t, _kr[IA64_KR_IO_BASE]));
215 DEFINE(IA64_KR_CURRENT_STACK_OFFSET, offsetof (cpu_kr_ia64_t, _kr[IA64_KR_CURRENT_STACK]));
217 #ifdef PERF_COUNTERS
218 BLANK();
219 DEFINE(RECOVER_TO_PAGE_FAULT_PERFC_OFS, offsetof (struct perfcounter, recover_to_page_fault));
220 DEFINE(RECOVER_TO_BREAK_FAULT_PERFC_OFS, offsetof (struct perfcounter, recover_to_break_fault));
221 DEFINE(FAST_HYPERPRIVOP_PERFC_OFS, offsetof (struct perfcounter, fast_hyperprivop));
222 DEFINE(FAST_REFLECT_PERFC_OFS, offsetof (struct perfcounter, fast_reflect));
223 #endif
224 }