direct-io.hg

view xen/include/asm-powerpc/domain.h @ 11498:464acece0dad

[POWERPC][XEN] Clear SLB entries on boot and other cleanups

This patch clears and SLB entries that might have been left behind by
Firmware and also cleans up the Save and Restore of the segments.

Signed-off-by: Jimi Xenidis <jimix@watson.ibm.com>
Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com>
author Jimi Xenidis <jimix@watson.ibm.com>
date Thu Sep 07 02:21:17 2006 -0400 (2006-09-07)
parents bc349d862a5d
children a60e804c0a31
line source
1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 *
16 * Copyright (C) IBM Corp. 2005
17 *
18 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
19 */
21 #ifndef _ASM_DOMAIN_H_
22 #define _ASM_DOMAIN_H_
24 #include <xen/cache.h>
25 #include <xen/sched.h>
26 #include <xen/list.h>
27 #include <xen/errno.h>
28 #include <xen/mm.h>
29 #include <public/arch-powerpc.h>
30 #include <asm/htab.h>
31 #include <asm/powerpc64/ppc970.h>
33 struct arch_domain {
34 struct domain_htab htab;
36 /* The Real Mode area is fixed to the domain and is accessible while the
37 * processor is in real mode */
38 struct page_info *rma_page;
39 uint rma_order;
41 /* list of extents beyond RMA */
42 struct list_head extent_list;
44 /* I/O-port access bitmap mask. */
45 u8 *iobmp_mask; /* Address of IO bitmap mask, or NULL. */
47 uint large_page_sizes;
48 uint large_page_order[4];
49 } __cacheline_aligned;
51 struct slb_entry {
52 ulong slb_vsid;
53 ulong slb_esid;
54 };
55 #define SLB_ESID_VALID (1ULL << (63 - 36))
56 #define SLB_ESID_CLASS (1ULL << (63 - 56))
57 #define SLB_ESID_MASK (~0ULL << (63 - 35))
58 #define SLBIE_CLASS_LOG (63-36)
59 #define SLBMTE_ENTRY_MASK ((0x1UL << (63 - 52 + 1)) - 1)
61 struct xencomm;
63 typedef struct {
64 u32 u[4];
65 } __attribute__((aligned(16))) vector128;
67 struct arch_vcpu {
68 cpu_user_regs_t ctxt; /* User-level CPU registers */
70 #ifdef HAS_FLOAT
71 double fprs[NUM_FPRS];
72 #endif
73 #ifdef HAS_VMX
74 vector128 vrs[32];
75 vector128 vscr;
76 u32 vrsave;
77 #endif
79 /* Special-Purpose Registers */
80 ulong sprg[4];
81 ulong timebase;
82 ulong dar;
83 ulong dsisr;
85 /* Segment Lookaside Buffer */
86 struct slb_entry slb_entries[NUM_SLB_ENTRIES];
88 /* I/O-port access bitmap. */
89 u8 *iobmp; /* Guest kernel virtual address of the bitmap. */
90 int iobmp_limit; /* Number of ports represented in the bitmap. */
91 int iopl; /* Current IOPL for this VCPU. */
93 u32 dec;
94 struct cpu_vcpu cpu; /* CPU-specific bits */
95 struct xencomm *xencomm;
96 } __cacheline_aligned;
98 extern void full_resume(void);
100 extern void save_sprs(struct vcpu *);
101 extern void load_sprs(struct vcpu *);
102 extern void save_segments(struct vcpu *);
103 extern void load_segments(struct vcpu *);
104 extern void save_float(struct vcpu *);
105 extern void load_float(struct vcpu *);
107 #define RMA_SHARED_INFO 1
108 #define RMA_START_INFO 2
109 #define RMA_LAST_DOM0 2
110 /* these are not used for dom0 so they should be last */
111 #define RMA_CONSOLE 3
112 #define RMA_LAST_DOMU 3
114 #define rma_size(rma_order) (1UL << ((rma_order) + PAGE_SHIFT))
116 static inline ulong rma_addr(struct arch_domain *ad, int type)
117 {
118 return rma_size(ad->rma_order) - (type * PAGE_SIZE);
119 }
121 #endif