direct-io.hg

view linux-2.6-xen-sparse/include/asm-x86_64/mach-xen/mach_timer.h @ 11509:2e6c10dc7c0b

[POWERPC][XEN] make sure put_domain() is called in case of allocate_rma() failuer

Signed-off-by: Jimi Xenidis <jimix@watson.ibm.com>
Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com>
author Jimi Xenidis <jimix@watson.ibm.com>
date Tue Sep 12 10:53:46 2006 -0400 (2006-09-12)
parents fd9b2c1bb577
children 3adf00179a63
line source
1 /*
2 * include/asm-i386/mach-default/mach_timer.h
3 *
4 * Machine specific calibrate_tsc() for generic.
5 * Split out from timer_tsc.c by Osamu Tomita <tomita@cinet.co.jp>
6 */
7 /* ------ Calibrate the TSC -------
8 * Return 2^32 * (1 / (TSC clocks per usec)) for do_fast_gettimeoffset().
9 * Too much 64-bit arithmetic here to do this cleanly in C, and for
10 * accuracy's sake we want to keep the overhead on the CTC speaker (channel 2)
11 * output busy loop as low as possible. We avoid reading the CTC registers
12 * directly because of the awkward 8-bit access mechanism of the 82C54
13 * device.
14 */
15 #ifndef _MACH_TIMER_H
16 #define _MACH_TIMER_H
18 #define CALIBRATE_LATCH (5 * LATCH)
20 static inline void mach_prepare_counter(void)
21 {
22 /* Set the Gate high, disable speaker */
23 outb((inb(0x61) & ~0x02) | 0x01, 0x61);
25 /*
26 * Now let's take care of CTC channel 2
27 *
28 * Set the Gate high, program CTC channel 2 for mode 0,
29 * (interrupt on terminal count mode), binary count,
30 * load 5 * LATCH count, (LSB and MSB) to begin countdown.
31 *
32 * Some devices need a delay here.
33 */
34 outb(0xb0, 0x43); /* binary, mode 0, LSB/MSB, Ch 2 */
35 outb_p(CALIBRATE_LATCH & 0xff, 0x42); /* LSB of count */
36 outb_p(CALIBRATE_LATCH >> 8, 0x42); /* MSB of count */
37 }
39 static inline void mach_countup(unsigned long *count_p)
40 {
41 unsigned long count = 0;
42 do {
43 count++;
44 } while ((inb_p(0x61) & 0x20) == 0);
45 *count_p = count;
46 }
48 #endif /* !_MACH_TIMER_H */