direct-io.hg

view linux-2.6-xen-sparse/include/asm-i386/mach-xen/asm/io.h @ 11509:2e6c10dc7c0b

[POWERPC][XEN] make sure put_domain() is called in case of allocate_rma() failuer

Signed-off-by: Jimi Xenidis <jimix@watson.ibm.com>
Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com>
author Jimi Xenidis <jimix@watson.ibm.com>
date Tue Sep 12 10:53:46 2006 -0400 (2006-09-12)
parents b765c96f8127
children 395aa5609e6d
line source
1 #ifndef _ASM_IO_H
2 #define _ASM_IO_H
4 #include <linux/config.h>
5 #include <linux/string.h>
6 #include <linux/compiler.h>
8 /*
9 * This file contains the definitions for the x86 IO instructions
10 * inb/inw/inl/outb/outw/outl and the "string versions" of the same
11 * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
12 * versions of the single-IO instructions (inb_p/inw_p/..).
13 *
14 * This file is not meant to be obfuscating: it's just complicated
15 * to (a) handle it all in a way that makes gcc able to optimize it
16 * as well as possible and (b) trying to avoid writing the same thing
17 * over and over again with slight variations and possibly making a
18 * mistake somewhere.
19 */
21 /*
22 * Thanks to James van Artsdalen for a better timing-fix than
23 * the two short jumps: using outb's to a nonexistent port seems
24 * to guarantee better timings even on fast machines.
25 *
26 * On the other hand, I'd like to be sure of a non-existent port:
27 * I feel a bit unsafe about using 0x80 (should be safe, though)
28 *
29 * Linus
30 */
32 /*
33 * Bit simplified and optimized by Jan Hubicka
34 * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
35 *
36 * isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
37 * isa_read[wl] and isa_write[wl] fixed
38 * - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
39 */
41 #define IO_SPACE_LIMIT 0xffff
43 #define XQUAD_PORTIO_BASE 0xfe400000
44 #define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */
46 #ifdef __KERNEL__
48 #include <asm-generic/iomap.h>
50 #include <linux/vmalloc.h>
51 #include <asm/fixmap.h>
53 /*
54 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
55 * access
56 */
57 #define xlate_dev_mem_ptr(p) __va(p)
59 /*
60 * Convert a virtual cached pointer to an uncached pointer
61 */
62 #define xlate_dev_kmem_ptr(p) p
64 /**
65 * virt_to_phys - map virtual addresses to physical
66 * @address: address to remap
67 *
68 * The returned physical address is the physical (CPU) mapping for
69 * the memory address given. It is only valid to use this function on
70 * addresses directly mapped or allocated via kmalloc.
71 *
72 * This function does not give bus mappings for DMA transfers. In
73 * almost all conceivable cases a device driver should not be using
74 * this function
75 */
77 static inline unsigned long virt_to_phys(volatile void * address)
78 {
79 return __pa(address);
80 }
82 /**
83 * phys_to_virt - map physical address to virtual
84 * @address: address to remap
85 *
86 * The returned virtual address is a current CPU mapping for
87 * the memory address given. It is only valid to use this function on
88 * addresses that have a kernel mapping
89 *
90 * This function does not handle bus mappings for DMA transfers. In
91 * almost all conceivable cases a device driver should not be using
92 * this function
93 */
95 static inline void * phys_to_virt(unsigned long address)
96 {
97 return __va(address);
98 }
100 /*
101 * Change "struct page" to physical address.
102 */
103 #define page_to_pseudophys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
104 #define page_to_phys(page) (phys_to_machine(page_to_pseudophys(page)))
105 #define page_to_bus(page) (phys_to_machine(page_to_pseudophys(page)))
107 #define bio_to_pseudophys(bio) (page_to_pseudophys(bio_page((bio))) + \
108 (unsigned long) bio_offset((bio)))
109 #define bvec_to_pseudophys(bv) (page_to_pseudophys((bv)->bv_page) + \
110 (unsigned long) (bv)->bv_offset)
112 #define BIOVEC_PHYS_MERGEABLE(vec1, vec2) \
113 (((bvec_to_phys((vec1)) + (vec1)->bv_len) == bvec_to_phys((vec2))) && \
114 ((bvec_to_pseudophys((vec1)) + (vec1)->bv_len) == \
115 bvec_to_pseudophys((vec2))))
117 extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
119 /**
120 * ioremap - map bus memory into CPU space
121 * @offset: bus address of the memory
122 * @size: size of the resource to map
123 *
124 * ioremap performs a platform specific sequence of operations to
125 * make bus memory CPU accessible via the readb/readw/readl/writeb/
126 * writew/writel functions and the other mmio helpers. The returned
127 * address is not guaranteed to be usable directly as a virtual
128 * address.
129 */
131 static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
132 {
133 return __ioremap(offset, size, 0);
134 }
136 extern void __iomem * ioremap_nocache(unsigned long offset, unsigned long size);
137 extern void iounmap(volatile void __iomem *addr);
139 /*
140 * bt_ioremap() and bt_iounmap() are for temporary early boot-time
141 * mappings, before the real ioremap() is functional.
142 * A boot-time mapping is currently limited to at most 16 pages.
143 */
144 extern void *bt_ioremap(unsigned long offset, unsigned long size);
145 extern void bt_iounmap(void *addr, unsigned long size);
147 /* Use early IO mappings for DMI because it's initialized early */
148 #define dmi_ioremap bt_ioremap
149 #define dmi_iounmap bt_iounmap
150 #define dmi_alloc alloc_bootmem
152 /*
153 * ISA I/O bus memory addresses are 1:1 with the physical address.
154 */
155 #define isa_virt_to_bus(_x) isa_virt_to_bus_is_UNSUPPORTED->x
156 #define isa_page_to_bus(_x) isa_page_to_bus_is_UNSUPPORTED->x
157 #define isa_bus_to_virt(_x) (void *)(__fix_to_virt(FIX_ISAMAP_BEGIN) + (_x))
159 /*
160 * However PCI ones are not necessarily 1:1 and therefore these interfaces
161 * are forbidden in portable PCI drivers.
162 *
163 * Allow them on x86 for legacy drivers, though.
164 */
165 #define virt_to_bus(_x) phys_to_machine(__pa(_x))
166 #define bus_to_virt(_x) __va(machine_to_phys(_x))
168 /*
169 * readX/writeX() are used to access memory mapped devices. On some
170 * architectures the memory mapped IO stuff needs to be accessed
171 * differently. On the x86 architecture, we just read/write the
172 * memory location directly.
173 */
175 static inline unsigned char readb(const volatile void __iomem *addr)
176 {
177 return *(volatile unsigned char __force *) addr;
178 }
179 static inline unsigned short readw(const volatile void __iomem *addr)
180 {
181 return *(volatile unsigned short __force *) addr;
182 }
183 static inline unsigned int readl(const volatile void __iomem *addr)
184 {
185 return *(volatile unsigned int __force *) addr;
186 }
187 #define readb_relaxed(addr) readb(addr)
188 #define readw_relaxed(addr) readw(addr)
189 #define readl_relaxed(addr) readl(addr)
190 #define __raw_readb readb
191 #define __raw_readw readw
192 #define __raw_readl readl
194 static inline void writeb(unsigned char b, volatile void __iomem *addr)
195 {
196 *(volatile unsigned char __force *) addr = b;
197 }
198 static inline void writew(unsigned short b, volatile void __iomem *addr)
199 {
200 *(volatile unsigned short __force *) addr = b;
201 }
202 static inline void writel(unsigned int b, volatile void __iomem *addr)
203 {
204 *(volatile unsigned int __force *) addr = b;
205 }
206 #define __raw_writeb writeb
207 #define __raw_writew writew
208 #define __raw_writel writel
210 #define mmiowb()
212 static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)
213 {
214 memset((void __force *) addr, val, count);
215 }
216 static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
217 {
218 __memcpy(dst, (void __force *) src, count);
219 }
220 static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count)
221 {
222 __memcpy((void __force *) dst, src, count);
223 }
225 /*
226 * ISA space is 'always mapped' on a typical x86 system, no need to
227 * explicitly ioremap() it. The fact that the ISA IO space is mapped
228 * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
229 * are physical addresses. The following constant pointer can be
230 * used as the IO-area pointer (it can be iounmapped as well, so the
231 * analogy with PCI is quite large):
232 */
233 #define __ISA_IO_base ((char __iomem *)(fix_to_virt(FIX_ISAMAP_BEGIN)))
235 #define isa_readb(a) readb(__ISA_IO_base + (a))
236 #define isa_readw(a) readw(__ISA_IO_base + (a))
237 #define isa_readl(a) readl(__ISA_IO_base + (a))
238 #define isa_writeb(b,a) writeb(b,__ISA_IO_base + (a))
239 #define isa_writew(w,a) writew(w,__ISA_IO_base + (a))
240 #define isa_writel(l,a) writel(l,__ISA_IO_base + (a))
241 #define isa_memset_io(a,b,c) memset_io(__ISA_IO_base + (a),(b),(c))
242 #define isa_memcpy_fromio(a,b,c) memcpy_fromio((a),__ISA_IO_base + (b),(c))
243 #define isa_memcpy_toio(a,b,c) memcpy_toio(__ISA_IO_base + (a),(b),(c))
246 /*
247 * Again, i386 does not require mem IO specific function.
248 */
250 #define eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void __force *)(b),(c),(d))
251 #define isa_eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void __force *)(__ISA_IO_base + (b)),(c),(d))
253 /**
254 * check_signature - find BIOS signatures
255 * @io_addr: mmio address to check
256 * @signature: signature block
257 * @length: length of signature
258 *
259 * Perform a signature comparison with the mmio address io_addr. This
260 * address should have been obtained by ioremap.
261 * Returns 1 on a match.
262 */
264 static inline int check_signature(volatile void __iomem * io_addr,
265 const unsigned char *signature, int length)
266 {
267 int retval = 0;
268 do {
269 if (readb(io_addr) != *signature)
270 goto out;
271 io_addr++;
272 signature++;
273 length--;
274 } while (length);
275 retval = 1;
276 out:
277 return retval;
278 }
280 /*
281 * Cache management
282 *
283 * This needed for two cases
284 * 1. Out of order aware processors
285 * 2. Accidentally out of order processors (PPro errata #51)
286 */
288 #if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
290 static inline void flush_write_buffers(void)
291 {
292 __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory");
293 }
295 #define dma_cache_inv(_start,_size) flush_write_buffers()
296 #define dma_cache_wback(_start,_size) flush_write_buffers()
297 #define dma_cache_wback_inv(_start,_size) flush_write_buffers()
299 #else
301 /* Nothing to do */
303 #define dma_cache_inv(_start,_size) do { } while (0)
304 #define dma_cache_wback(_start,_size) do { } while (0)
305 #define dma_cache_wback_inv(_start,_size) do { } while (0)
306 #define flush_write_buffers()
308 #endif
310 #endif /* __KERNEL__ */
312 #ifdef SLOW_IO_BY_JUMPING
313 #define __SLOW_DOWN_IO "jmp 1f; 1: jmp 1f; 1:"
314 #else
315 #define __SLOW_DOWN_IO "outb %%al,$0x80;"
316 #endif
318 static inline void slow_down_io(void) {
319 __asm__ __volatile__(
320 __SLOW_DOWN_IO
321 #ifdef REALLY_SLOW_IO
322 __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO
323 #endif
324 : : );
325 }
327 #ifdef CONFIG_X86_NUMAQ
328 extern void *xquad_portio; /* Where the IO area was mapped */
329 #define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port)
330 #define __BUILDIO(bwl,bw,type) \
331 static inline void out##bwl##_quad(unsigned type value, int port, int quad) { \
332 if (xquad_portio) \
333 write##bwl(value, XQUAD_PORT_ADDR(port, quad)); \
334 else \
335 out##bwl##_local(value, port); \
336 } \
337 static inline void out##bwl(unsigned type value, int port) { \
338 out##bwl##_quad(value, port, 0); \
339 } \
340 static inline unsigned type in##bwl##_quad(int port, int quad) { \
341 if (xquad_portio) \
342 return read##bwl(XQUAD_PORT_ADDR(port, quad)); \
343 else \
344 return in##bwl##_local(port); \
345 } \
346 static inline unsigned type in##bwl(int port) { \
347 return in##bwl##_quad(port, 0); \
348 }
349 #else
350 #define __BUILDIO(bwl,bw,type) \
351 static inline void out##bwl(unsigned type value, int port) { \
352 out##bwl##_local(value, port); \
353 } \
354 static inline unsigned type in##bwl(int port) { \
355 return in##bwl##_local(port); \
356 }
357 #endif
360 #define BUILDIO(bwl,bw,type) \
361 static inline void out##bwl##_local(unsigned type value, int port) { \
362 __asm__ __volatile__("out" #bwl " %" #bw "0, %w1" : : "a"(value), "Nd"(port)); \
363 } \
364 static inline unsigned type in##bwl##_local(int port) { \
365 unsigned type value; \
366 __asm__ __volatile__("in" #bwl " %w1, %" #bw "0" : "=a"(value) : "Nd"(port)); \
367 return value; \
368 } \
369 static inline void out##bwl##_local_p(unsigned type value, int port) { \
370 out##bwl##_local(value, port); \
371 slow_down_io(); \
372 } \
373 static inline unsigned type in##bwl##_local_p(int port) { \
374 unsigned type value = in##bwl##_local(port); \
375 slow_down_io(); \
376 return value; \
377 } \
378 __BUILDIO(bwl,bw,type) \
379 static inline void out##bwl##_p(unsigned type value, int port) { \
380 out##bwl(value, port); \
381 slow_down_io(); \
382 } \
383 static inline unsigned type in##bwl##_p(int port) { \
384 unsigned type value = in##bwl(port); \
385 slow_down_io(); \
386 return value; \
387 } \
388 static inline void outs##bwl(int port, const void *addr, unsigned long count) { \
389 __asm__ __volatile__("rep; outs" #bwl : "+S"(addr), "+c"(count) : "d"(port)); \
390 } \
391 static inline void ins##bwl(int port, void *addr, unsigned long count) { \
392 __asm__ __volatile__("rep; ins" #bwl : "+D"(addr), "+c"(count) : "d"(port)); \
393 }
395 BUILDIO(b,b,char)
396 BUILDIO(w,w,short)
397 BUILDIO(l,,int)
399 /* We will be supplying our own /dev/mem implementation */
400 #define ARCH_HAS_DEV_MEM
402 #endif