direct-io.hg

view tools/xentrace/xentrace.8 @ 11422:0419253c81de

Fix inverted sense of getRequiredAvailableMemory and
getRequiredInitialReservation on x86 HVM.

Signed-off-by: Ewan Mellor <ewan@xensource.com>
author Ewan Mellor <ewan@xensource.com>
date Tue Sep 05 16:23:11 2006 +0100 (2006-09-05)
parents c5551469f00e
children 6efc22cb9c84
line source
1 .TH XENTRACE 8 "11 March 2004" "Xen domain 0 utils"
2 .SH NAME
3 xentrace \- capture Xen trace buffer data
4 .SH SYNOPSIS
5 .B xentrace
6 [
7 .I OPTIONS
8 ] [
9 .I FILE
10 ]
11 .SH DESCRIPTION
12 .B xentrace
13 is used to capture trace buffer data from Xen. The data is
14 output in the following binary format (host endian):
15 .PP
16 CPU(uint) TSC(u64) EVENT(u32) D1 D2 D3 D4 D5 (all u32)
17 .PP
18 Where CPU is the processor number, TSC is the record's timestamp
19 (the value of the CPU cycle counter), EVENT is the event ID and
20 D1...D5 are the trace data.
22 Data is dumped onto the standard output (which must not be a TTY) or a
23 \fIFILE\fP specified on the command line.
25 The output should be parsed using the tool xentrace_format, which can
26 produce human-readable output in ASCII format.
29 .SS Options
30 .TP
31 .B -t, --log-thresh=l
32 set the threshold number, l, of new records required to trigger a write of
33 all new records to the output
34 .TP
35 .B -s, --poll-sleep=p
36 set the time, p, (in milliseconds) to sleep between polling the buffers
37 for new data.
38 .TP
39 .B -c, --cpu-mask=c
40 set cpu-mask
41 .TP
42 .B -e, --evt-mask=e
43 set evt-mask
44 .TP
45 .B -?, --help
46 Give this help list
47 .TP
48 .B --usage
49 Give a short usage message
50 .TP
51 .B -V, --version
52 Print program version
54 .SS Event Classes (Masks)
55 The following event classes (masks) can be used to filter the events being
56 gathered by xentrace:
57 .PP
58 \fIID\fP \fIDescription\fP
59 .PP
60 0x0001f000 TRC_GEN
61 0x0002f000 TRC_SCHED
62 0x0004f000 TRC_DOM0OP
63 0x0008f000 TRC_VMX
64 0x000af000 TRC_MEM
65 0xfffff000 TRC_ALL
68 .SS Event Subclasses (More Masks)
69 The following event subclasses (masks) can also be used to filter the events being
70 gathered by xentrace:
71 .PP
72 \fIID\fP \fIDescription\fP
73 .PP
74 0x00081000 TRC_VMXEXIT
75 0x00082000 TRC_VMXTIMER
76 0x00084000 TRC_VMXINT
77 0x00088000 TRC_VMXIO
80 .SS Events
81 .B xentrace
82 collects the following events from the trace buffer:
83 .PP
84 \fIID\fP \fIDescription\fP
85 .PP
86 0x0002f001 TRC_SCHED_DOM_ADD
87 0x0002f002 TRC_SCHED_DOM_REM
88 0x0002f003 TRC_SCHED_SLEEP
89 0x0002f004 TRC_SCHED_WAKE
90 0x0002f005 TRC_SCHED_YIELD
91 0x0002f006 TRC_SCHED_BLOCK
92 0x0002f007 TRC_SCHED_SHUTDOWN
93 0x0002f008 TRC_SCHED_CTL
94 0x0002f009 TRC_SCHED_ADJDOM
95 0x0002f010 TRC_SCHED_SWITCH
96 0x0002f011 TRC_SCHED_S_TIMER_FN
97 0x0002f012 TRC_SCHED_T_TIMER_FN
98 0x0002f013 TRC_SCHED_DOM_TIMER_FN
99 0x0002f014 TRC_SCHED_SWITCH_INFPREV
100 0x0002f015 TRC_SCHED_SWITCH_INFNEXT
102 0x000af001 TRC_MEM_PAGE_GRANT_MAP
103 0x000af002 TRC_MEM_PAGE_GRANT_UNMAP
104 0x000af003 TRC_MEM_PAGE_GRANT_TRANSFER
106 0x00081001 TRC_VMX_VMEXIT
107 0x00081002 TRC_VMX_VMENTRY
109 0x00082001 TRC_VMX_TIMER_INTR
111 0x00084001 TRC_VMX_INT
112 .PP
114 .SH AUTHOR
115 Mark A. Williamson <mark.a.williamson@intel.com>
117 .SH "SEE ALSO"
118 xentrace_cpuinfo(1), xentrace_format(1)