direct-io.hg

view xen/arch/powerpc/external.c @ 11385:030a041bbe90

[XEN][POWERPC] cleanup for (;;);

When the port first started, we didn't even have panic() working
properly so we used "for(;;);" loops to stop execution. Now that output
is buffered these look like hangs, since you usually do not see the
printk() before.

Signed-off-by: Jimi Xenidis <jimix@watson.ibm.com>
Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com>
author Jimi Xenidis <jimix@watson.ibm.com>
date Tue Aug 29 06:53:58 2006 -0400 (2006-08-29)
parents 050de6b53961
children 3b045a00e703
line source
1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 *
16 * Copyright (C) IBM Corp. 2005, 2006
17 *
18 * Authors: Jimi Xenidis <jimix@watson.ibm.com>
19 */
21 #include <xen/config.h>
22 #include <xen/types.h>
23 #include <xen/sched.h>
24 #include <xen/lib.h>
25 #include <xen/event.h>
26 #include <xen/irq.h>
27 #include <public/xen.h>
28 #include <asm/current.h>
29 #include <asm/hardirq.h>
30 #include <asm/mpic.h>
31 #include "mpic_init.h"
32 #include "exceptions.h"
34 #undef DEBUG
35 #ifdef DEBUG
36 #define DBG(fmt...) printk(fmt)
37 #else
38 #define DBG(fmt...)
39 #endif
41 int vector_irq[NR_VECTORS] __read_mostly = { [0 ... NR_VECTORS - 1] = -1};
43 unsigned long io_apic_irqs;
44 int ioapic_ack_new = 1;
46 static struct hw_interrupt_type *hc_irq;
48 /* deliver_ee: called with interrupts off when resuming every vcpu */
49 void deliver_ee(struct cpu_user_regs *regs)
50 {
51 const ulong srr_mask = ~(MSR_IR | MSR_DR | MSR_FE0 | MSR_FE1 | MSR_EE |
52 MSR_RI |
53 MSR_BE | MSR_FP | MSR_PMM | MSR_PR | MSR_SE);
55 BUG_ON(mfmsr() & MSR_EE);
56 BUG_ON(regs->msr & MSR_HV);
58 if (!local_events_need_delivery())
59 return;
61 /* XXX OS error: EE was set but RI was not. We could trigger a machine
62 * check, or kill the domain... for now just crash Xen so we notice. */
63 BUG_ON(!(regs->msr & MSR_RI));
65 regs->srr0 = regs->pc;
66 /* zero SRR1[33:36] and SRR1[42:47] */
67 regs->srr1 = regs->msr & ~0x00000000783f0000;
68 regs->pc = 0x500;
69 regs->msr &= srr_mask;
70 regs->msr |= MSR_SF | MSR_ME;
72 DBG("<HV: pc=0x%lx, msr=0x%lx\n", regs->pc, regs->msr);
73 }
75 void do_external(struct cpu_user_regs *regs)
76 {
77 int vec;
79 BUG_ON(!(regs->msr & MSR_EE));
80 BUG_ON(mfmsr() & MSR_EE);
82 vec = xen_mpic_get_irq(regs);
84 if (vec != -1) {
85 DBG("EE:0x%lx isrc: %d\n", regs->msr, vec);
86 regs->entry_vector = vec;
87 do_IRQ(regs);
89 BUG_ON(mfmsr() & MSR_EE);
90 }
91 }
93 static int xen_local_irq(unsigned int irq)
94 {
95 irq_desc_t *desc;
96 unsigned int vector;
98 vector = irq_to_vector(irq);
99 desc = &irq_desc[vector];
101 return !(desc->status & IRQ_GUEST);
102 }
104 static unsigned int xen_startup_irq(unsigned int irq)
105 {
106 DBG("%s(%d)\n", __func__, irq);
107 if (xen_local_irq(irq)) {
108 return hc_irq->startup(irq);
109 }
110 return 0;
111 }
113 static void xen_shutdown_irq(unsigned int irq)
114 {
115 DBG("%s(%d)\n", __func__, irq);
116 if (xen_local_irq(irq)) {
117 hc_irq->shutdown(irq);
118 }
119 }
121 static void xen_enable_irq(unsigned int irq)
122 {
123 DBG("%s(%d)\n", __func__, irq);
124 if (xen_local_irq(irq)) {
125 hc_irq->enable(irq);
126 }
127 }
129 static void xen_disable_irq(unsigned int irq)
130 {
131 DBG("%s(%d)\n", __func__, irq);
132 if (xen_local_irq(irq)) {
133 hc_irq->disable(irq);
134 }
135 }
137 static void xen_ack_irq(unsigned int irq)
138 {
139 DBG("%s(%d)\n", __func__, irq);
140 if (xen_local_irq(irq)) {
141 if (hc_irq->ack) hc_irq->ack(irq);
142 }
143 }
145 static void xen_end_irq(unsigned int irq)
146 {
147 DBG("%s(%d)\n", __func__, irq);
148 if (xen_local_irq(irq)) {
149 hc_irq->end(irq);
150 }
151 }
153 static void xen_set_affinity(unsigned int irq, cpumask_t mask)
154 {
155 DBG("%s(%d)\n", __func__, irq);
156 if (xen_local_irq(irq)) {
157 if (hc_irq->set_affinity) hc_irq->set_affinity(irq, mask);
158 }
159 }
161 static struct hw_interrupt_type xen_irq = {
162 .startup = xen_startup_irq,
163 .enable = xen_enable_irq,
164 .disable = xen_disable_irq,
165 .shutdown = xen_shutdown_irq,
166 .ack = xen_ack_irq,
167 .end = xen_end_irq,
168 .set_affinity = xen_set_affinity,
169 };
171 void init_IRQ(void)
172 {
173 hc_irq = xen_mpic_init(&xen_irq);
174 }
176 void ack_APIC_irq(void)
177 {
178 panic("%s: EOI the whole MPIC?\n", __func__);
179 }
181 void ack_bad_irq(unsigned int irq)
182 {
183 printk("unexpected IRQ trap at vector %02x\n", irq);
184 /*
185 * Currently unexpected vectors happen only on SMP and APIC.
186 * We _must_ ack these because every local APIC has only N
187 * irq slots per priority level, and a 'hanging, unacked' IRQ
188 * holds up an irq slot - in excessive cases (when multiple
189 * unexpected vectors occur) that might lock up the APIC
190 * completely.
191 */
192 ack_APIC_irq();
193 }
195 extern void dump_ioapic_irq_info(void);
196 void dump_ioapic_irq_info(void)
197 {
198 printk("%s: can't dump yet\n", __func__);
199 }
201 /* irq_vectors is indexed by the sum of all RTEs in all I/O APICs. */
202 u8 irq_vector[NR_IRQ_VECTORS] __read_mostly = { FIRST_DEVICE_VECTOR , 0 };
203 int assign_irq_vector(int irq)
204 {
205 static int current_vector = FIRST_DEVICE_VECTOR, offset = 0;
207 BUG_ON(irq >= NR_IRQ_VECTORS);
208 if (irq != AUTO_ASSIGN && IO_APIC_VECTOR(irq) > 0)
209 return IO_APIC_VECTOR(irq);
210 next:
211 current_vector += 8;
213 /* Skip the hypercall vector. */
214 if (current_vector == HYPERCALL_VECTOR)
215 goto next;
217 /* Skip the Linux/BSD fast-trap vector. */
218 if (current_vector == FAST_TRAP)
219 goto next;
221 if (current_vector >= FIRST_SYSTEM_VECTOR) {
222 offset++;
223 if (!(offset%8))
224 return -ENOSPC;
225 current_vector = FIRST_DEVICE_VECTOR + offset;
226 }
228 vector_irq[current_vector] = irq;
229 if (irq != AUTO_ASSIGN)
230 IO_APIC_VECTOR(irq) = current_vector;
232 return current_vector;
233 }
235 int ioapic_guest_read(unsigned long physbase, unsigned int reg, u32 *pval)
236 {
237 BUG_ON(pval != pval);
239 return 0;
240 }
242 int ioapic_guest_write(unsigned long physbase, unsigned int reg, u32 val)
243 {
244 BUG_ON(val != val);
245 return 0;
246 }